Altera: Stratix 10 MX Devices Solve the Memory Bandwidth Challenge

June 02, 2016 // By Manish Deo, Jeffrey Shulz, Lance Brown
Conventional memory solutions have limitations that make it difficult for them to meet next-generation memory bandwidth requirements. This white paper describes the emerging memory landscape that addresses these limitations. The Stratix 10 MX DRAM system-in-package (SiP) family combines a 1 GHz high-performance monolithic FPGA fabric, state-of-the-art Intel Embedded Multi-die Interconnect Bridge (EMIB) technology, and High Bandwidth Memory 2 (HBM2), all in a single package. The Stratix 10 MX family helps customers efficiently meet their most demanding memory bandwidth requirements, which are not possible using conventional memory solutions.