Audio/video clock generator needs no external clock conditioning
April 14, 2010 // Paul Buckley
A new triple-rate (3G/HD/SD) audio/video clock generator from National Semiconductor Corp., eliminates the need for external clock conditioning in professional and broadcast video equipment.
The LMH1983 replaces three external phase-lock loops (PLLs), voltage-controlled crystal oscillators (VCXOs) and loop filters to simplify design, reduce bill of materials (BOM) cost and conserve board area. It generates four simultaneous low-voltage differential signaling (LVDS) clocks with dedicated top-of-frame timing pulses, providing a plug-and-play solution with minimal FPGA programming. The LMH1983 also eliminates the time-consuming PLL tweaking, required with discrete A/V clock generator implementations, accelerating time to market. The LMH1983 supports SMPTE serial digital interface (SDI) video and digital audio AES3/EBU standards for 1080p high-definition (HD) video cameras and video capture, conversion, processing, editing and distribution equipment.
For video processing and format converter cards, the LMH1983 simultaneously provides the SMPTE 424M system clocks (148.5 MHz and 148.5/1.001 MHz) required by the latest generation of FPGAs. For broadcast studios that genlock video equipment, the LMH1983 generates a synchronized high-frequency clock at the digital pixel rate phase-locked to the horizontal and vertical timing signals of the reference video signal. For applications that embed the audio signal or remove it from the video signal, the LMH1983 generates synchronous audio and video clocks locked to the video reference signal. All news
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