Bridging the gap between ESL and RTL by linking simulation environments
July 11, 2012 // Nick Flaherty
Aldec and Agilent Technologies are aiming to bridge the gap between high level language design and implementation by linking their simulation environments.
The two companies have developed a new co-simulation interface between the latest version of Aldec's Riviera-PRO design simulation and verification platform used by FPGA, ASIC, and SoC development teams, and SystemVue, Agilent’s ESL design and signal processing environment used by system architects and algorithm developers in physical layer designs of wireless, RF and DSP applications. The new interface enables users to efficiently integrate algorithm and system-level designs with hardware implementations.
“Agilent system-level design products are now integrated into the hardware design flow, which enables system engineers to troubleshoot Verilog and VHDL hardware implementations, while still maintaining a higher-level view of physical layer (PHY) system performance,” said Daren McClearnon, Agilent’s SystemVue Product Marketing Manager. “Our respective R&D teams worked closely together to create a high-performance yet cost-efficient co-simulation interface that unites baseband, RF, simulations, and measurements in single, system-level cockpit.”
The new co-simulation interface requires only one instance of Riviera-PRO (regardless of the number of HDL blocks on a SystemVue diagram), supports a range of data types, and provides extensive cross-domain debugging capabilities. This tight, bi-directional integration reduces development time and effort by enabling continuous test and system-level verification throughout the development process.
“The Agilent SystemVue co-simulation interface brings several exciting new features to hardware design verification engineers, our traditional customers,” said Dmitry Melnik, Riviera-PRO Product Manager. “It enables the link to a powerful RF System simulator, RF EDA tools and models, trusted references for emerging communications standards, and even test and measurement equipment if necessary. Now engineers can re-use SystemVue components in hardware simulations while respective HDL blocks are being coded, or use SystemVue as a testbench to verify HDL implementation.”
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Internet of Things (IoT) manufacturer Ciseco has launched the Raspberry Pi ‘Wireless Inventors Kit’ (RasWIK), featuring 88 pieces to provide everything a Pi owner needs to follow a series of step-by-step projects or to create their own wireless devices, without the need for configuration or even writing code.
RasWIK has been designed to be highly accessible, demystifying the dark art of wireless and enabling anyone with basic computing skills to begin building wireless devices with a Raspberry Pi. You can create anything from a simple traffic light, to a battery monitor, or even a temperature gauge that sends data to the Xively IoT cloud so billions can access the data.This month, Ciseco is giving away twelve Raspberry Pi Wireless Inventors kits, worth £49.99 each for EETimes Europe's readers to win.
And the winners are...
In our previous reader offer, Farsens was giving away five kits for EEtimes Europe readers to evaluate its FenixVortex, Kineo and X1 wireless, battery free sensor tags.
Lucky winners include Mr A. Neil from the UK, Mr. E. Delvaux from Belgium, Mr Lengal from the Czech Republic, Mr H. Bijlsma from the Netherlands, and Mr G. Pfaff from Germany. All should be receiving their packages soon. Lets wish them some interesting findings with their projects.
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