Print  |  Send  |   

Cadence expands verification IP portfolio to accelerate adoption of emerging mobile standards

September 27, 2011 // Paul Buckley

Cadence expands verification IP portfolio to accelerate adoption of emerging mobile standards

Cadence Design Systems, Inc., has unveiled new protocol and memory model verification IP (VIP) that will accelerate the adoption of the latest mobile standards. Through close collaboration with leading system and semiconductor companies, and standards bodies, Cadence is delivering VIP at an early stage in many cases, ahead of the final specification helping mobile SoC and system manufacturers to be first to market with increasingly feature-rich mobile devices, such as smartphones and tablets.


Page 1 of 3

The need for increased computing power and sophisticated video, audio and storage on mobile devices has given rise to new standards that improve performance and power, while reducing development time and cost, said Ziv Binyamini, corporate vice president, research and development, System Realization Group at Cadence. In order to leverage these standards, our customers need solutions that can accurately test the functionality of their design and ensure manufacturing success. Our extensive protocol expertise, combined with our track record of effectively verifying thousands of designs for over a decade, gives customers a proven path to success in the mobile market.

MIPI Alliance continues to advance mobile interface standards with processor and peripheral protocols that streamline system development and expand the sophistication of todays mobile devices, said Joel Huloux, chairman of the board, MIPI Alliance. By ensuring verification support for these protocols at the earliest stage possible, companies such as Cadence enable mobile designers to embrace the latest standards and deliver products that transform the consumers mobile experience.

Earlier this year, Cadence became the first company to add support for ARM Ltd.s AMBA 4 Coherency Extensions protocol (ACE), speeding the development of multiprocessor mobile devices, and the DFI 3.0 specification , which defines an interface protocol between DDR memory controllers and PHYs.

Cadence has expanded the companys VIP offering for mobile applications with support for the following standards:

1 | 2 | 3 | Next page

All news

Wireless Comms,EDA Design Tools

Follow us

Fast, Accurate & Relevant for Design Engineers only!

Technical papers     

Linear video channel

READER OFFER

Read more

This month, Arrow Electronics is giving away ten BeMicro Max 10 FPGA evaluation boards together with an integrated USB-Blaster, each package being worth 90 Euros, for EETimes Europe's readers to win.

Designed to get you started with using an FPGA, the BeMicro Max 10 adopts Altera's non-volatile MAX 10 FPGA built on 55-nm flash process.

The MAX 10 FPGAs are claimed to revolutionize...

MORE INFO AND LAST MONTH' WINNERS...

Design centers     

Automotive
Infotainment Making HDTV in the car reliable and secure

December 15, 2011 | Texas instruments | 222901974

Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.

 

You must be logged in to view this page

Login here :