Cadence expands verification IP portfolio to accelerate adoption of emerging mobile standards
September 27, 2011 // Paul Buckley
Cadence Design Systems, Inc., has unveiled new protocol and memory model verification IP (VIP) that will accelerate the adoption of the latest mobile standards. Through close collaboration with leading system and semiconductor companies, and standards bodies, Cadence is delivering VIP at an early stage – in many cases, ahead of the final specification – helping mobile SoC and system manufacturers to be first to market with increasingly feature-rich mobile devices, such as smartphones and tablets.
“The need for increased computing power and sophisticated video, audio and storage on mobile devices has given rise to new standards that improve performance and power, while reducing development time and cost,” said Ziv Binyamini, corporate vice president, research and development, System Realization Group at Cadence. “In order to leverage these standards, our customers need solutions that can accurately test the functionality of their design and ensure manufacturing success. Our extensive protocol expertise, combined with our track record of effectively verifying thousands of designs for over a decade, gives customers a proven path to success in the mobile market.”
“MIPI Alliance continues to advance mobile interface standards with processor and peripheral protocols that streamline system development and expand the sophistication of today’s mobile devices,” said Joel Huloux, chairman of the board, MIPI Alliance. “By ensuring verification support for these protocols at the earliest stage possible, companies such as Cadence enable mobile designers to embrace the latest standards and deliver products that transform the consumer’s mobile experience.”
Earlier this year, Cadence became the first company to add support for ARM Ltd.’s AMBA 4 Coherency Extensions protocol (ACE), speeding the development of multiprocessor mobile devices, and the DFI 3.0 specification , which defines an interface protocol between DDR memory controllers and PHYs.
Cadence has expanded the company’s VIP offering for mobile applications with support for the following standards:
- LPDDR3: This low-power version of the pervasive DDR3 memory standard enables customers to meet the high bandwidth and power efficiency requirements of mobile systems.
- MIPI CSI-3: Providing an advanced processor-to-camera sensor interface, MIPI CSI-3 enables mobile devices to deliver the bandwidth required to enable high resolution video and 3D.
- MIPI Low Latency Interface (LLI): This interface cuts mobile device production cost by allowing DRAM memory sharing between multiple chips.
- USB 3.0 On-The-Go (OTG) : Providing 10x the performance of the previous USB specification, USB 3.0 OTG allows consumers to rapidly transfer data, such as video and audio content, as well as quickly and effortlessly charge devices.
- Universal Flash Storage (UFS): A common flash storage specification for mobile devices, UFS, a JEDEC standard, is designed to bring higher data transfer speed and increased reliability to flash memory storage.
- eMMC4.5: Designed for secure, yet flexible program code and data storage, eMMC4.5, a JEDEC standard, enables high bandwidth, low pin-count solutions that simplify system design.
- cJTAG: With its support for reduced pin count, power management and simplified multichip debug, cJTAG enables efficient testing of mobile devices, a key requirement for delivering high volume, high quality mobile devices.
Visit Cadence at www.cadence.com
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