Cadence’s library characterization scripts now available in TSMC’s reference kit
October 18, 2011 // Julien Happich
Cadence Design Systems announced that it has collaborated with TSMC to provide mutual customers access to a library characterization reference kit. The Cadence Library Characterizer (Altos Liberate) reference kit for TSMC's standard cell libraries is now available to TSMC customers for download on the foundry’s website.
The reference kit, along with the Cadence Library Characterizer technology, enables customers to re-characterize their standard cell libraries in-house, on their own schedule with the same characterization technology and setup used internally at TSMC, delivering better consistency. Shrinking process geometries increase process variations and make creation of accurate noise, power and timing models for foundation IP very complex given smaller time-to-market windows. The combination of TSMC’s Library Characterization Reference Kit and the Cadence Library Characterizer allows customers to speed their overall design schedule.
The Cadence Library Characterizer technology enables re-characterization across process changes and additions to the IP library. It enables ultra-fast and accurate characterization of memory, standard cell libraries and other foundation IP, generating required models for SoC implementation. TSMC has made Cadence Library Characterizer scripts for standard cell libraries available for 40- and 28-nanometer process nodes.
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