Clock jitter cleaner family claims industry's lowest phase noise
March 21, 2011 // Paul Buckley
National Semiconductor has introduced a new family of clock jitter cleaners that claim to feature the industryís lowest phase noise and rms jitter performance: 111 fs from 12 kHz to 20 MHz, and a wideband noise floor of -162 dBc/Hz at 184 MHz output frequency. The level of phase noise enhances the performance of systems used in wireless and wired communications, test and measurement, medical imaging, software defined radio (SDR) and digital broadcast applications, while reducing overall bill of materials (BOM) cost.
The LMK04800 family comprises of four ICs including the LMK04808, LMK04806, LMK04805 and LMK04803, and is optimized for generating different frequencies up to 1.5 GHz for clocking ADCs, DACs, SerDes and FPGAs. With integrated features such as holdover, switchover, multiple inputs, digital delay, analogue delay, odd/even dividers and 12 programmable output format drivers, the LMK04800 ICs are highly flexible and configurable to support a variety of different architectures – all while reducing the number of components and design effort traditionally required to implement these functions.
The combination of performance and functional integration reduces clock architecture complexity and provides design engineers with multiple options to trade-off system performance, component count and cost. The LMK04800 clock jitter cleaners combine with National's high-speed op amps and ADCs (LMH6554, LMH6517, ADC12D1600, ADC12D1000, and ADC16DV160) to provide a complete signal-path system solution.
Availability and Pricing
Supplied in 64-pin LLP packages, the LMK04808, LMK04806, LMK04805 and LMK04803 are available now and priced at $9.15 each in 1,000-unit quantities.
More information about LMK04800 family of clock jitter cleaners at www.national.com/pf/LM/LMK04800.html
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Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.