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Cypress and Future Electronics develop low-cost PSoC 3 development board

July 13, 2010 // Paul Buckley

Cypress and Future Electronics develop low-cost PSoC 3 development board

Cypress Semiconductor Corp. and Future Electronics have introduced a low-cost development†board to demonstrate the ease-of-use of Cypress's new PSoC 3 architecture. The† Future Electronics PSoC 3 Development Board shows how developers can use† the flexible PSoC 3 architecture and the PSoC Creator Integrated† Development Environment (IDE) to streamline designs.

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The Future Electronics PSoC 3 Development Board features:

  • On-Board Debug/Programmer
  • CapSense Touch Pad Interface
  • TriColor - Red/Green/Blue LEDs
  • User USB Interface Power through USB Ports
  • Two Connectors for I/Os and Expansion Boards Optional CAN Oscillator
The two Expansion Board Kit (EBK) connectors on the board enable it to work with a growing ecosystem of solution-based expansion kits that Cypress is developing, including segment LCD, CAN and more. Future will also be developing an expansion board for the new Sharp Pixel in Memory LCD with power consumption 130 times lower than standard LCDs of comparable size.

PSoC 3 development board

The companies have also announced that interested parties can request free onsite introductorydemonstrations of the new development board or half-day, hands-on workshops.

PSoC 3 and PSoC 5 devices extend the world's only programmable analog and digital embedded design platform, delivering unmatched time-to-market, integration, and flexibility across 8-, 16-, and 32-bit applications. PSoC 3 and PSoC 5 offer high-precision programmable analog including 12- to 20-bit delta-sigma ADCs, digital logic libraries full of dozens of drop-in peripherals, best-in-class power management and rich connectivity resources. The PSoC Creator IDE introduces a unique schematic-based design methodology along with fully tested, pre-packaged analog and digital peripherals easily customizable through user-intuitive wizards and APIs to meet specific design requirements.
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