Print  |  Send  |   

Design Optimization and Analysis of IC Packages for USB 3.0

February 16, 2011 // Mentor Graphics // 0 comments

Design Optimization and Analysis of IC Packages for USB 3.0 Download White Paper 1Mo

USB 3.0 is rapidly being adopted by a growing number of system level companies, spawning many integrated device manufacturers (IDMs) to develop new chips to address this need. USB 3.0 supports data transfer rates up to 4.2 Gbits/sec, creating new challenges for IC package designers and signal integrity engineers that must be addressed as part of the high-speed SERDES design process. This paper will introduce important design considerations and an effective high-speed design methodology recently successfully employed for the design of a commercial USB 3.0 part.

All White Papers

Submit a white paper

Follow us

Fast, Accurate & Relevant for Design Engineers only!

Technical papers     

Linear video channel


Read more

This month, LabNation is giving away three of its SmartScope open source USB oscilloscopes, worth 229 Euros each, for EETimes Europe's readers to win.

Successfully funded through Kickstarter last year, the SmartScope is claimed to be the world's first test equipment designed to run on multiple operating systems and platforms such as smartphones, tablets and PCs. It is powered directly from the host’s USB interface.


Design centers     

Infotainment Making HDTV in the car reliable and secure

December 15, 2011 | Texas instruments | 222901974

Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.


You must be logged in to view this page

Login here :