Print  |  Send  |   

Designing a cellular low power DDR non-volatile memory system

April 14, 2010 // eetimes // 0 comments

Designing a cellular low power DDR non-volatile memory system Download White Paper 441Ko

Cellular phone systems continue to rely on NOR flash memory to deliver high read bandwidth to run application code. For current eXecute-In-Place (XIP) systems, NOR flash devices are used to run application code, and high-speed SDRAM is used for frequently accessed data. To increase memory throughput performance, many cellular memory systems now use LPDDR SDRAM as the main system memory for data. This practice creates a memory infrastructure that requires at least two separate buses, one for SDRAM and one for flash.


All White Papers


Submit a white paper

Follow us

Fast, Accurate & Relevant for Design Engineers only!

Technical papers     

Linear video channel

READER OFFER

Read more

This month Ambiq Micro is giving away five of its 'Apollo EVB' evaluation boards, worth 9 each for EETimes Europe’s readers to assess the capabilities of their cutting-edge Apollo sub-threshold microcontroller.

The new suite of Apollo MCUs is based on the 32-bit ARM Cortex-M4 floating point microcontroller and redefines 'low power' with energy consumption that is typically five to ten times lower than that of MCUs of comparable performance (thanks to Ambiq’s patented Subthreshold Power Optimized Technology platform).


MORE INFO AND LAST MONTH' WINNERS...

Design centers     

Automotive
Infotainment Making HDTV in the car reliable and secure

December 15, 2011 | Texas instruments | 222901974

Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.

 

You must be logged in to view this page

Login here :