NICE, France * Committed to intellectual property (IP) reusability, French EDA startup Satin IP Technologies has introduced at the DATE conference this week in Nice, France, a design-for-reuse software cockpit.

Satin IP said its quality management software, dubbed VIP Lane, supports design engineers and project managers in their efforts to make design-for-reuse a daily reality.

Complementing and interoperating with EDA and PLM tools, VIP Lane is claimed to work as an implementation channel for design-for-reuse processes which semiconductor companies usually have in place. The solution runs on a web server application and captures all parameters and objects affecting IP quality, from multiple sources throughout the IP design and integration lifecycle, asserted Satin IP.

VIP Lane is based on the company's patented design quality abstraction layer, and offers "checklist-driven design assistance in the design reuse areas of specifications, coding, implementation, verification and support of SoC integration.

Commenting on this announcement, Michel Tabusse, Satin IP's CEO, declared: "Large semiconductor companies, as well as IP vendors, cannot meet their objectives merely by using the most up-to-date EDA and PLM software. Most companies have defined best design-for-reuse practices internally and see a need to get those practices adopted throughout the design teams without incurring additional productivity costs. With VIP Lane, we provide the opportunity to do exactly that.

The company noted that VIP Lane has delivered value to various design projects at the Laboratoire d'Informatique, Robotique et Microélectronique de Montpellier (LIRMM), France.