First 40nm Thunderbird active cable chips sample
May 09, 2012 // Nick Flaherty
Intersil has started sampling the first 40nm chips for the 20Gbit/s Thunderbird active cable specification.
Using 40nm reduces standby power consumption by as much as 50% and patent-pending cable compensation techniques allow cable manufacturers to use inexpensive bulk cable with enhanced yield. Built-In Test (BIST) eliminates expensive and time consuming manual testing by integrating an embedded processor, PRBS generator and error checker.
As data rates in cables reach 10Gbps and beyond, the physical properties of thin cables cause significant signal impairment. In order to correct for signal impairment, complex high-speed transceiver ICs must be located within the connectors at each end of a cable. The Thunderbolt active cable specification - developed by Intel and used by Apple - is the first consumer examples of this trend which will become prevalent for high-speed interconnections in the coming years.
Intersils solution provides two bi-directional channels with an aggregate transfer rate of 20Gbps. Users can easily interconnect Thunderbolt-enabled products with a single thin cable, and daisy-chain up to six devices.
Weve set the stage for an unprecedented low price point for Thunderbolt cable, said Roger Levinson, vice president & general manager for Intersils signal path products group. This will promote the simple, high-speed interconnection of peripherals that lead to enhanced digital experiences. Our 40nm technology reduces the cost of every variable in the cable manufacturing process, enabling the widespread adoption of Thunderbolt technology.All news
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