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FPGA Design Methods for Fast Turn Around

April 28, 2010 // Angela Sutton // 0 comments

FPGA Design Methods for Fast Turn Around Download White Paper 828Ko

FPGAs have been used for years to create functioning prototypes of ASIC and System on a Chip (SoC) designs, and the popularity of this verification technique continues to increase. Indeed, well over 90% of designs are prototyped using FPGAs. Such verification typically involves squeezing the evolving design, eventually destined for an ASIC, into the largest, most capable FPGAs available on the market and then debugging the design along with system software and drivers on the board.


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This month Ambiq Micro is giving away five of its 'Apollo EVB' evaluation boards, worth 9 each for EETimes Europe’s readers to assess the capabilities of their cutting-edge Apollo sub-threshold microcontroller.

The new suite of Apollo MCUs is based on the 32-bit ARM Cortex-M4 floating point microcontroller and redefines 'low power' with energy consumption that is typically five to ten times lower than that of MCUs of comparable performance (thanks to Ambiq’s patented Subthreshold Power Optimized Technology platform).


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