Freescale develops industry’s first software-aware system architecture
June 20, 2012 // Nick Flaherty
Freescale Semiconductor has developed the industry's first software-aware, core-agnostic framework for its silicon to support a profusion of connected devices, massive datasets, more stringent security needs, real-time service provisioning and increasingly unpredictable network traffic patterns.
The architecture modularizes packet acceleration and forwarding operations from high-level routing decisions; streamlines interaction between the layers; leverages a synchronous run-to-completion model; and supports a consistent programming framework across the architecture using standard C/C++ languages. The extreme programming flexibility and scale of the architecture enable real-time, soft control over the network, preserve software investments and help to ensure continued evolution.
To address the need for more intelligent, dynamic networks, Freescale has taken our QorIQ platform a significant step further with the new software-aware Layerscape architecture, said Tom Deitrich, senior vice president and general manager of Freescales Networking & Multimedia Solutions Group. Weve made software awareness an integral part of our new architecture instead of an afterthought. With innovations including core-agnostic compatibility, independent, highly efficient packet processing and real-time visualization capability, were accelerating the networks IQ.
The architecture is the foundation of a broad array of forthcoming QorIQ multicore processors, from many-core data path devices delivering up to 100 Gbps of performance to highly integrated, cost- and energy-efficient products operating at less than 3W, using both Power Architecture and ARM technologies as appropriate.
The modular Layerscape architecture consists of three independent, scalable layers, allowing Freescale to design QorIQ devices with expanded, reduced or removed layers as needed, providing the optimal solution for a given application. The first of three layers is a General-Purpose Processing Layer (GPPL) for general purpose compute performance. This layer is optimized for virtualized cloud services and control plane applications. The Accelerated Packet Processing Layer (APPL) performs autonomous packet processing and enables customers to program value-added capabilities in a sequential, synchronous, run-to-completion model that abstracts the hardware microarchitecture and gives customers an embedded, C-based programming model. The third, Express Packet I/O Layer (EPIL), provides deterministic wire-rate performance between network interfaces up to 100G, supporting switching capabilities for L2 and above.All news
XCore architecture attracts Bosch investment
July 22, 2014
British fabless semiconductor maker XMOS Ltd, provider of multicore microcontrollers, has successfully completed a series ...
Steep growth for thermoelectric energy harvesting, says Infinergia Consulting
AMS, Dialog merger talks fail
MIT wrist-robot adds extra fingers
Li-ion batteries market for EVs to quadruple in a decade
Monolithic Power Systems signs with Avnet Memec
July 22, 2014
Monolithic Power Systems (MPS) and Avnet Memec have agreed on a Pan-European value-added distribution partnership.
Thoughts on energy harvesting for wearable equipment
Will laser ignition replace the venerable spark plug?
Merger creates powerhouse in micro imaging software
- Testing GPS with a Simulator
- DSM presents: Select the best plastic for DDR4
- Dual 13A μModule Regulator with Digital Interface for Remote Monitoring & Control of Power
- Exploring the Business Model Evolution of High-Tech Equipment Manufacturers
InterviewCEO interview: China, not Apple, is way to go, says mCube CEO
Ben Lee, CEO of MEMS startup mCube, explains why he wants to spend $37 million on being a supplier of sensors to Chinese ODMs and avoiding a design win with Apple or Samsung.
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
This month, Altium Ltd is offering EETimes Europe's readers the chance to win one TASKING VX-Toolset for ARM Cortex-M Premium Edition, normally licensed for 2.395 Euros, for ultra-rapid prototyping and code development around ARM Cortex-M based microcontrollers.
The VX-toolset for ARM is the first TASKING compiler suite to receive the Software Platform technology, which is seamlessly...Read more
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.