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French RISC core aims at touch-screen apps

May 06, 2011 // Peter Clarke

French RISC core aims at touch-screen apps

Cortus SA, foundry MagnaChip Semiconductor Corp., and design house Taegee Co., Ltd., have collaborated on the development of a 32-bit microntroller intended for touch-screen applications in tablet and laptop computers and smart phones.


The application-specific MCU (ASMCU) is based on the APS3 processor core from Cortus (Montpellier, France) and associated IP cores and software that enable touch and gesture recognition. This 32-bit microprocessor technology has been ported to Magnachip's 0.18-micron EEPROM manufacturing process technology by a design team at Taegee (Cheongju, South Korea). The jointly developed ASMCU will be manufactured for Taegee by MagnaChip foundry services (Cheongju, South Korea).

"The ASMCU developed for touch screen controllers is an excellent example of the products that will come out of this partnership. Our APS3 processor core is ideal for these applications with its low power, high performance and small core size," said Mike Chapman, president and CEO of Cortus, in a statement.

"The comprehensive training and simple interfaces provided by Cortus ensured very rapid integration helping us keep ahead of our aggressive schedules," said Channy Lee, president and CEO of Taegee, in the same statement. "The small silicon footprint and low power consumption features enabled us to meet our design goals and while providing the required processor performance. The APS3 will be a key feature in many of our future ASMCU designs."

The Cortus APS3 is a high performance 32-bit processor designed specifically for embedded systems. It offers 32-bit performance on a silicon foot-print that is the same as an 8-bit 8051, the company claimd. This contributes to a low power consumption, high code density and performance of up to 1.67-DMIPS/MHz.

A development environment for C and C++ is available together with embedded system peripherals, bus bridges and system support and functions such as cache and memory management units. The APS3 can be also used in a multi-core configuration.


For further information: www.cortus.com, www.taegee.com, www.magnachip.com.

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