Give away: 6 copies of Rambus' latest book 'High-Speed Signaling'
May 01, 2012 // Julien Happich
As data communication rates accelerate well into the multi-gigahertz range, ensuring signal integrity both on- and off-chip has become crucial. Signal integrity can no longer be addressed solely through improvements in package or board-level design.
Diverse engineering teams must work together closely from the earliest design stages to identify the best system-level solutions. In High-Speed Signaling, several of the field's most respected practitioners and researchers introduce cutting-edge modeling, simulation, and optimization techniques for meeting this challenge.
Edited by pioneering experts Drs. Dan Oh and Chuck Yuan, these contributors explain why noise and jitter are no longer separable, demonstrate how to model their increasingly complex interactions, and thoroughly introduce a new simulation methodology for predicting link-level performance with unprecedented accuracy.
The authors address signal integrity from architecture through high-volume production, thoroughly discussing design, implementation, and verification.
- - New advances in passive-channel modeling, power-supply noise and jitter modeling, and system margin prediction
- Methodologies for balancing system voltage and timing budgets to improve system robustness in high-volume manufacturing
- Practical, stable formulae for converting key network parameters
- Improved solutions for difficult problems in the broadband modelling of interconnects
- Equalization techniques for optimizing channel performance
- Important new insights into the relationships between jitter and clocking topologies
- New on-chip measurement techniques for in-situ link performance testing
- Trends and future directions in signal integrity engineering
The book thoroughly introduces new techniques pioneered at Rambus and other leading high-tech companies and universities: approaches that have never before been presented with this much practical detail. It will be invaluable to everyone concerned with signal integrity, including signal and power integrity engineers, high-speed I/O circuit designers, and system-level board design engineers.
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The SoCKIT evaluation kit is Arrow's latest development tool, featuring an Altera Cyclone V SoC with a dual-core ARM Cortex-A9 MPCore processor integrated within its 28nm FPGA fabric.
Altera SoCs allow embedded system developers to differentiate their end product with customized hardware and software, and extend the product lifecycle through hardware and software updates in the field. This month, Arrow Electronics is giving away five SoCKIT evaluation kits featuring Altera’s ARM-Based SoCs, worth €249 each, together with the free entrance to one of Arrow’s SoC workshops organized throughout Europe.
And the winners are...
In our previous reader offer, Freescale Semiconductor was giving away five IMX6Q, Sabre-lite kits, worth £128.06 each.
Lucky winners include Mr. X. Salada Sole from the UK, Mrs A. Peric from Germany, Mr Z. Janosy from Hungary, Mr D. Gacina from Croatia and Mr B. Boris from France. All should be receiving their packages soon. Let's wish them some interesting findings with their projects.
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Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.