Goepel electronic combines boundary scan with JTAG platform Cable USB II from Xilinx
June 07, 2012 // Julien Happich
In cooperation with Xilinx, Goepel electronic has developed a new software option to support Platform Cable USB II.
The solution completely integrates the Xilinx hardware into the IEEE 1149.x development environment System Cascon, enabling the use of Platform Cable USB II as native controller to execute boundary scan tests throughout the entire product life cycle.
In conjunction with the appropriate development software, Platform Cable USB II offers the opportunity to configure Xilinx PLD/FPGA components via the JTAG interface and to validate implemented designs.
The USB interface power supplies the hardware. Platform Cable USB II is integrated at the same level as Goepel electronic's native IEEE 1149.x controllers by means of the implemented software extension. Therefore, it is able to execute all boundary scan test procedures such as infrastructure tests, memory tests, cluster tests or interconnection tests, supporting all tools integrated in System Cascon such as automated test program generation, automatic pin level fault diagnosis, multi mode debugger, batch executor, automatic flash programmer and PLD/FPGA programmer. In this context, Platform Cable USB II can additionally provide in-system programing (ISP) for all flash components with moderate data. These test and programming operations are trouble-free and also possible in the case of design integrated multi drop devices as respective control sequences are involved in the TAP bit stream fully automatically.
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