High density FIFO memories up to 72 Mbits
June 08, 2011 // Julien Happich
Cypress Semiconductor announced First-In, First-Out (FIFO) memories with densities up to 72 Mbit, aimed at video and imaging applications which require high density and high frequency for effective buffering. The HD FIFO is an advanced buffering alternative to standard synchronous DRAM memories used in combination with large FPGAs.
Cypress's HD FIFOs offer enhanced signal integrity compared to a DRAM based solution, and operate at 133MHz frequency which is well-suited for buffering video frames. The HD FIFO offers up to eight separate directly addressable queues to enable designers to stream multiple video channels simultaneously. Using an HD FIFO enables designers to use a smaller FPGA, resulting in overall system cost reduction. Cypress’s HD FIFO also reduces design complexity, thus speeding time-to-market for video and imaging systems in broadcast, military, medical and BTS segments.
The new HD FIFOs are available in 18-, 36- and 72-Mbit densities. They support multiple I/O standards, including 3.3V and 1.8V LVCMOS and HSTL1. The HD FIFO solution also provides user-selectable memory organization and can be configured as a x9, x12, x16, x18, x20, x24, x32 or x36 device, providing designers flexibility to choose optimal depth and width. All of the HD FIFO densities are offered in the 209-ball BGA package, which ensures scalability.
The FIFOs are available for sampling in a 14x22x1.86mm 209-ball BGA package
Visit Cypress Semiconductor at www.cypress.com
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