Print  |  Send  |   

Intel exec claims fabless model “collapsing”

April 25, 2012 // Rick Merritt

Intel exec claims fabless model “collapsing”

It’s the beginning of the end for the fabless model according to Mark Bohr, the man I think of as Mr. Process Technology at Intel.

Page 1 of 1

Bohr claims TSMCs recent announcement it will serve just one flavor of 20 nm process technology is an admission of failure. The Taiwan fab giant apparently cannot make at its next major node the kind of 3-D transistors needed mitigate leakage current, Bohr said.

Qualcomm wont be able to use that [20 nm] process, Bohr told me in an impromptu discussion at yesterdays press event where Intel announced its Ivy Bridge CPUs made in its tri-gate 22 nm process. The foundry model is collapsing, he told me.

Of course Intel would like the world to believe that only it can create the complex semiconductor technology the world needs. Not TSMC that serves competitors like Qualcomm or GlobalFoundries that makes chips for Intels archrival AMD.

Intel used the Ivy Bridge event to spin the tale of how part of the secret to its success is its close partnership between process and chip designers.

Kirk Skaugen, the new general manager of Intels client PC group, moderated a Q&A with Bohr and Brad Heaney, the Ivy Bridge program manager. In addition to working together on Intels first CPUs using 3-D transistors, the two collaborated on Intels first processors using high-K metal gate technology.

Being an integrated device manufacturer really helps us solve the problems dealing with devices this small and complex, Bohr said in the Q&A.

I dont doubt that for a minute. Since the dawn of submicron design, EE Times has been writing about the need for ever closer collaboration between chip and process designers. An Nvidia physical design exec underlined the same point in a recent talk at Mentor Graphics annual user group meeting.

But Bohr stretches the point too far when he says the foundries and fabless companies wont be able to follow where Intel is going. I have heard top TSMC and GlobalFoundries R&D managers make a good case that 3-D transistors wont be needed until the 14 nm generation. For its part, TSMC said at 20 nm there is not enough wiggle room to create significant variations for high performance versus low power processes.

However, in an open Q&A, Bohr said Intel has completed work on an SoC-specific version of its process technology. It plans going forward to have an SoC variant a quarter or two after each main process is complete.

For its part, Qualcomm would not provide its opinions on TSMCs 20 nm plans. The company did say in its recent quarterly earnings call it cant get enough 28 nm technology from TSMC to meet product demand, so it is working to develop multiple new sources it expects will come online later this year.

Thats a big opportunity for a GlobalFoundries, UMC or other fabs to step up. Given the close sharing of design details required to make 28 nm SoCs, its more of a risk than an opportunity for Qualcomm to work with Samsungs foundry folks, Bohr said, given Samsung has its own Exynos mobile SoCs.

I asked Bohr to whom Intel is providing access to its 22 nm process besides two announced partnersAchronix and Netronome. He only said that Intel does not want to be in the foundry business, but it makes its technology available to a few strategic partners.

Intel has no monopoly on smart process technology engineers and designers. But it does have some brilliant ones, and it has learned to market them smartly. Bohr and Heaney even appeared yesterday in another one of Intels playful videos shrinking the two engineers so they could tour the insides of an Ivy Bridge chip.

Looking ahead, Bohr said Intel has finished characterizing its next-generation 14 nm process using immersion lithography. It even has encouraging results suggesting it will be able to use immersion litho for the 10 nm node that is still in early planning phase.

We think we have a [10nm] solution using immersion lithographywed love to have extreme ultraviolet [EUV] lithography, but we are not counting on it, said Bohr in the event Q&A.

As a follow up, I asked whether Intel has other new process tricks like 3-D transistors at 14 and 10 nm. His answer: Yes!


All news


Follow us

Fast, Accurate & Relevant for Design Engineers only!

Technical papers     

Linear video channel


Read more

This month Ambiq Micro is giving away five of its 'Apollo EVB' evaluation boards, worth 9 each for EETimes Europe’s readers to assess the capabilities of their cutting-edge Apollo sub-threshold microcontroller.

The new suite of Apollo MCUs is based on the 32-bit ARM Cortex-M4 floating point microcontroller and redefines 'low power' with energy consumption that is typically five to...


Design centers     

Infotainment Making HDTV in the car reliable and secure

December 15, 2011 | Texas instruments | 222901974

Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.


You must be logged in to view this page

Login here :