Lattice unveils first low cost FPGA to support Broadcom HiGig protocol
November 29, 2010 // Paul Buckley
Lattice Semiconductor Corporation has added the HiGig MAC IP core to low cost LatticeECP3 FPGA family. Multiple individual devices interconnected via the HiGig protocol operate as one logical network, seamlessly providing features like quality of service (QoS), mirroring and link aggregation.
The HiGig MAC ensures that the Media Access rules specified in the 802.3ae IEEE standard and HiGig Protocol definitions are met while transmitting a frame of data over Ethernet. On the receive side, it extracts the different components of a frame and transfers them to higher applications through a FIFO interface. With this new Lattice IP core, designers will be able to implement low cost network solutions using Broadcom devices.
Compliant with Broadcom HiGig and HiGig2 protocol definitions, the HiGig MAC IP core has a 64-bit wide internal data path operating at a maximum frequency of 156 MHz on the LatticeECP3 FPGA. The core provides XGMII and XAUI interfaces to the PHY layer and supports variable-sized packet transmission with fixed-sized messaging capability (HiGig2 only). With multicast address filtering and 16-bit statistics counters, the core requires approximately 4100 FPGA look-up tables (LUTs) for HiGig implementations and approximately 4700 FPGA LUTs for HiGig2 implementations.
The HiGig MAC IP core developed by Lattice is supported by Lattice’s IPexpress FPGA design tool module. Included as a standard feature in the Lattice Diamond design environment, the IPexpress module reduces design time by allowing IP parameterization and timing analysis on the designer’s desktop. This allows users to customize Lattice's extensive library of IP functions for their unique applications, integrate them with their proprietary FPGA logic designs and evaluate the overall device operation via simulation and timing analysis prior to making any IP purchase commitments.
Availability and Pricing
The HiGig MAC IP core is available now and can be ordered through Lattice sales with a list price of $5,000.
More information about the HiGig MAC IP core at
Visit Lattice Semiconductor at www.latticesemi.com
Rohm buys Renesas wafer fab
May 25, 2015
Rohm Co. Ltd. (Kyoto, Japan) has moved to acquire a 200mm wafer fab from Renesas Electronics Corp. for 450 million yen (about ...
SK Hynix, Sharp move up chip vendor ranking
IDT partners EPC to integrate GaN and silicon technologies
Reduce EMI with 42-V, 5-A synchronous step-down silent switcher
Egg-shaped micro home runs on wind, solar power
Extensible CPU cores exploit IoT's vast potential
May 22, 2015
Cisco Systems has predicted that by 2020, there will be 50 billion “things” connected to the Internet up from 15 billion ...
Audi connects to Baidu, Huawei at CES Asia
LED roadway solutions focus on rural, remote communities
New class of magnets attract energy harvesting attention
- Integrating GPS into consumer products
- Controlling LED Lighting Using Triacs and Quadracs
- Automotive Designs Demand Low EMI Synchronous Buck Converters
- Smart Capacitive Design Tips
InterviewCEO interview: What's next after Tower's turn-around?
May 2015 marks the tenth anniversary of Russell Ellwanger taking over as CEO of speciality foundry Tower Semiconductor Ltd. (Migdael Haemek, Israel), which now trades as TowerJazz. And so EE Times Europe ...
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
In this month's reader offer, Analog Devices is giving away five Blackfin Low-Power Imaging Platform (BLIP) Development Systems (ADZS-BF707-BLIP2), worth 199 dollars each, for EETimes Europe's readers to win.
Targeting demanding ultra-low-power, real-time applications for image sensing and advanced audio, the development platform leverages the company’s ADSP-BF707BBCZ-4 Blackfin processor as...MORE INFO AND LAST MONTH' WINNERS...
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.