Memory firms detail sub-20-nm NAND chips
February 24, 2012 // EE Times
Engineers from Samsung Electronics Co. Ltd., Toshiba Corp., and SanDisk Corp., took to the podium to provide details of their respective 19-nm NAND flash chips in presentations at the International Solid-State Circuit Conference (ISSCC) on Wednesday (February 22).
Samsung's Daeyeal Lee delivered a paper describing the company's 64-Gbit multi-level cell (MLC) NAND device implemented in sub-20-nm technology. The device features a 533-megabit-per-second DDR interface achieved by implementing a wave-pipeline architecture, Lee said. The chip also makes use of new techniques to overcome floating-gate coupling interference and mitigate program disturbance, Lee said.
According to Lee, the use of the new schemes, known as correction-before-recoupling reprogram and P3 pattern pre-pulse scheme, results in a 21 percent lower bit error rate compared with conventional techniques. Lee described another technique, inhibit-channel-coupling-reduction, for mitigating program disturbance in the chip.
A bit of controversy erupted at the end of Lee's presentation, when one audience member, who identified himself as a member of conference's memory subcommittee, chastised Lee for declining to describe the size of memory cell size of the chip, suggesting that Samsung was not providing enough information for an ISSCC paper.
Earlier Wednesday, Toshiba's Noboru Shibata described his company's 19-nm multi-level 64-Gbit NAND device. Shibata said the chip's die size is 112.8 square millimeters, the smallest ever reported for a NAND flash device.
According to Shibata's presentation, the Toshiba chip, which was developed under its long-standing collaboration with SanDisk, achieves an industry first with 15-megabyte-per-second programming throughput. The device employs a one-sided, all-bitline architecture and single-array configuration, he reported. The chip also employes a high-speed toggle-mode interface, he reported.
Asked to comment on the write cycle endurance of the device—an increasing concern as chip makers shrink the feature sizes of NAND—Shibata said it was equivalent to Toshiba's 24-nm NAND. Shibata's presentation described the implementation of a new memory cell programming algorithm meant to mitigate program disturbances.
Also Wednesday, Yan Li, director of memory design at SanDisk, presented a paper on SanDisk's 19-nm, 128-Gbit monolithic device that stores 3-bits per memory cell, the highest density IC ever produced.
The engineering desk-to-bench ratio
November 21, 2014
Dennis Feucht discusses the right and wrong, senior and junior ways to organize the theoretical and practical work of an ...
Rohm's European Design Center in growth phase
Combo inertial sensor market on 19% CAGR, says Yole.
US, China pushing industrial chip market growth, says IHS
LA Auto Show: Hydrogen fuel cell drive is back
Opening up the IoT data flood gates
November 21, 2014
Only a few days after their LoRa long range communication demo at electronica, IBM and Semtech are making the LoRa MAC protocol ...
Polarizing filter reduces energy drain from smartphone displays
From warm to cool white: colour-temperature tunable LEDs
System provides high-volume solution for flexible OLED displays
- Halogen-free options and increased performance for terminal blocks
- Wireless Power User Guide
- Secure is the New Smart
- 5 Best Practices for Designing Flexible Test Stations
InterviewFreescale CEO: 'IoT isn't just buzz'
Coming after the solid third quarter results that produced higher operating margins and improving cash flow, Freescale Semiconductor's CEO Gregg Lowe had every reason to be chipper and lively when EE Times ...
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
This month, Cherry is giving away five of its Energy Harvesting Evaluation kits, worth over 266 Euros each, for EETimes Europe's readers to win. Cherry's energy harvesting technology benefit mostly applications where a complex wire assembly and/or batteries would be inappropriate.
The required RF-energy is created by the mechanical actuation of the switch and the data is transmitted...MORE INFO AND LAST MONTH' WINNERS...
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.
Most popular news
- Could magnesium battery innovation end lithium's dominance?
- From warm to cool white: colour-temperature tunable LEDs
- Li-Fi communication module wirelessly transfers data at 1-Gbps
- Supercapacitor innovation promises panel-powered cars in five years
- Rebranding the revolution: the future of IoT is embedded