NEC joins IBM's global chip process partnership
September 11, 2008 //
IBM Corp. (Armonk, N.Y.) and NEC Electronics Corp. (Kawasaki, Japan) have announced they have entered into a multi-year joint development agreement under which they will develop next-generation semiconductor process technology.
LONDON IBM Corp. (Armonk, N.Y.) and NEC Electronics Corp. (Kawasaki, Japan) have announced they have entered into a multi-year joint development agreement under which they will develop next-generation semiconductor process technology.
Under the agreement, NEC Electronics will participate in a joint development project for the next-generation core CMOS process, at the 32-nm node, and in advanced fundamental research for leading-edge semiconductor technologies of the future.
NEC is joining Chartered Semiconductor Manufacturing Ltd., Freescale Semiconductor Inc., Infineon Technologies AG, Samsung Electronics Co. Ltd., STMicroelectronics NV and Toshiba Corp. in the Common Platform Alliance. NEC Electronics will be the eighth major semiconductor manufacturer represented in the IBM joint development alliance aimed to further advance performance and power improvements for next generation silicon technologies.
"As the 'scaling' of semiconductors to ever smaller feature sizes continues, the cost of conducting basic research and development and the associated capital investment continues to rise," said Gary Patton, vice president, IBM Semiconductor Research & Development Center, in a statement. "Our unique collaborative model for semiconductor research and development helps to mitigate individual investment while allowing for increased design complexity, shortened time-to-market and quicker integration of next-generation process materials and technology nodes."
At present NEC Electronics co-develops 45-nm and 32-nm CMOS process technology nodes with Toshiba and is now extending that collaboration to include the 32-nm and finer nodes with IBM and its alliance partners. As well as developing a common process platform NEC Electronics plans to work with IBM and partners to strengthen development and design ability for system-on-chip, IBM said.
"At the highest levels of technology, it is becoming increasingly difficult for semiconductor companies to differentiate their products on the core CMOS process technologies alone. A better course is to share the development costs of a common process platform with leading semiconductor manufacturers from around the world," said Toshio Nakajima, president and CEO, NEC Electronics, in the same statement. "The new agreement with IBM means that NEC Electronics will develop a common semiconductor process with industry leaders, allowing us to focus on being first to market in areas of eDRAM products and SoC solutions that provide our customers with the added value, such as high reliability and low power consumption."
The work will be conducted at IBM's state-of-the-art 300-mm semiconductor fabrication facility in East Fishkill, N.Y. and at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany, State University of New York.
IBM and its partners have reported performance and power advances with the use of "high-k/metal gate" (HKMG) for 32-nm silicon manufactured at IBM's East Fishkill wafer fab. This has enabled performance improvements in circuits of up to 35 percent over 45-nm technology at the same operating voltage. The 32-nm power reduction over 45-nm can be as much as 30 to 50 percent depending on the operating voltage, IBM said.
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