Peregrine Semiconductor and Soitec announce new bonded silicon-on-sapphire substrate for RFIC manufacturing
December 08, 2010 // Jean-Pierre Joosting
Peregrine Semiconductor and Soitec have announced the joint development and ramp in production of a new, bonded silicon-on-sapphire (SOS) substrate which has been qualified for use in manufacturing Peregrine's next-generation STeP5 UltraCMOS™ RF IC semiconductors.
This announcement marks an achievement for both companies in the evolution of bonded SOS wafers. Soitec’s core direct wafer-bonding technologies and state-of-the art industrial know-how combined with Peregrine’s legacy SOS process development and IC design expertise enabled the rapid development of a tuned substrate that delivers leading-edge RF performance required by the ever-advancing mobile wireless and industrial markets.
The new substrate is a bonded monocrystalline SOS substrate jointly engineered by the two companies. Soitec’s process expertise and direct wafer-bonding technologies were utilized to transfer and bond a high-quality, monocrystalline thin silicon layer onto a sapphire substrate. The resulting bonded silicon layer offers impressive improvements in transistor mobility and silicon quality beyond conventional SOS wafers which utilize an epitaxially grown silicon layer.
The new substrate provides Peregrine an ideal design landscape for enhancements in RFIC performance, functionality, and form factor, enabling IC size reduction and performance increase by as much as 30 percent. It also enables Peregrine to continue its long-term strategy toward highly integrated RF Front-End (RFFE) IC solutions in a substrate technology that matches the yield and scalability qualities of bulk silicon technologies.
For further information: www.psemi.com, www.soitec.com.
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