Researchers carve CPU into plastic foil

November 23, 2010 // Rick Merritt

A crude microprocessor built from two thin sheets of plastic foil may steal some of the spotlight from traditional CPU giants when it debuts at a seminal industry event in February. The International Solid State Circuits Conference will also host papers on a 5.2 GHz processor from IBM and an Intel Itanium chip packing 54 Mbytes cache.

At ISSCC, researchers from Europe will describe an 8-bit, 6 Hz device running a hardcoded program on two sheets of foil just 25 microns thick, using a 10 V power supply. The team hails from five organizations including the Imec research center in Belgium and startup Polymer Vision (Eindhoven, Netherlands) which is developing flexible displays.

"The organic processor is showing real promise though it is some distance from real utility," said Ken Smith, one of the organizers of ISSCC.

At the other end of the spectrum IBM will describe what ISSCC organizer claim is one of the fastest microprocessors to date, a 5.2 GHz CMOS chip designed for the company's Z-series mainframes. The four-core CPU, built in a 45nm silicon–on-insulator process, packs nearly 30 Mbytes of cache and will be used in IBM's zEnterprise 196 systems.

The paper will describe how IBM overcame timing, power and noise issues to hit the 5.2 GHz data rate at a time when other CPU designers are keeping a lid on clocks to conserve power. "The IBM Z-series guys have a different perspective on building processors even from the IBM Power processor people," said David Kanter, who edits a Web site on microprocessor design.

Intel will aim to set its own record with a 32nm Itanium processor that packs 3.1 billion transistors—much of it for a whopping 54 Mbyte cache. "That’s nearly twice anything else in on-chip cache," said Kanter who wrote an analysis of the chip.

The eight-core Poulson processor measures 544mm² compared to 512mm² for the IBM Z-series chip. Poulson uses a version of Intel's Quick Path Interconnect scaled up to an estimated 8 GTransfers/second as well as an on-chip ring bus both borrowed from the company's Nehalem x86 server processors.

"This shows Intel is doing more reuse across chips," said Kanter.

Separately, Intel and archrival Advanced Micro Devices will face off with papers describing processors set to debut in January that merge x86 and graphics cores. Intel will describe its 32nm Sandy Bridge that combines four x86 cores with a graphics core. AMD will discuss its 40nm Zacate processor using two new Bobcat x86 cores and a Radeon HD5000 graphics core.

AMD will also present papers expected to provide more detail on Bulldozer, its new high-end x86 core first described at the Hot Chips conference in August. Researchers from the Chinese Academy of Sciences and Loongson Technologies (Beijing) will present a paper on the Godson-3B an eight-core 65nm processor also described at Hot Chips.

The Godson-3B "is a big and important step" for China, said Smith of ISSCC. "The pace at which they have been developing new technology is very significant," he said.

Technical papers     

• High Voltage Surge Stoppers Ensure Reliable Operation During Power Surges
• AR RF/Microwave Instrumentation Field Analyzers
• 16-Bit, 100 kSPS Low Power Successive Approximation ADC System
• Replacing the Candle in the Candelabra

December 15, 2011 | Texas instruments | 222901974

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