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Seoul Semi seeks its USP inside the LED chip

November 02, 2011 // Christoph Hammerschmidt

Seoul Semi seeks its USP inside the LED chip

Seoul Semiconductor, number four in the global LED semiconductor business, plans to move up in the ranking. General Manager Manuel Zarauza explained the company's strategy.

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Seoul Semiconductor sees its sweet spot in the LED lighting value chain solely in the production of semiconductors, General Manager Manuel Zarauza explained in an interview with EE Times Europe. The company has no plans to follow the general industry trend towards forward integration. The reason is that following this trend and cover a bigger part of the value chain would unavoidably bring the company into a competitive situation against its own customers. "Our focus is strictly on the semiconductor part of the value chain: Front-end, epitaxy and packaging", Zarauza said.

In the market environment, the price is a strategic tool for the Korean company. "We want to lower the price barrier," the General Manager explained. The company bets heavily on the market for retrofit solutions - not only for incandescent bulbs but also for tubes and flat panels. In this market environment, Seoul Semi is seeking a unique selling proposal beyond the usual one-dimensional criterion of luminous flux. "With lumens alone, you cannot generate a unique selling proposal," Zarauza said. "The `wow` effect must emerge from the LED chip, from something in the front-end and from something nobody can copy", the manager said, referring to Seoul Semi's significant stock of more than 6500 patents.

One of the solutions Seoul Semiconductor has found on the way to distinguishing itself from the competition, the company's semiconductor technologists have found a solution to keep the LED chip cool and thus avoid efficacy losses at high temperatures: In an approach the company calls "vertical chip", the designers insert a metal layer into the semiconductor which leads the heat to the outside and thus keep the junction cool. Since this layer is inserted at chip level in contrast to packaging level it is more effective, Zarauza explained.

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