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Signal conditioners claim industry's highest performance at lowest power

January 31, 2012 // Paul Buckley

Signal conditioners claim industry's highest performance at lowest power

Texas Instruments Incorporated has introduced 10 signal conditioners designed to drive high-speed interface standards such as 10G/40G/100G Ethernet, 10G-KR (802.3ap), InfiniBand, Fibre Channel and CPRI. The ICs join a comprehensive family of repeaters and retimers that combat signal impairments caused by insertion loss, jitter, reflections and crosstalk in high-speed enterprise servers, routers and switches.

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Manufactured using TIs high-performance BiCMOS SiGe process technology, the new signal conditioners claim to deliver the industrys highest signal reach performance at less than 6-mW per gigabit.

Key features and benefits of the DS1xxDF410, DS1xxRT410 and DS100KRxxx families include:

1) Extend reach to exceed 50+ inches of FR-4 backplane or 20 meters of 26-AWG copper cable:

  • 36-dB input EQ and 12-dB output de-emphasis (DE)
  • Multi-tap decision feedback equalizer (DFE
  • Clock and data recovery (CDR) with internal clock synthesis
  • Repeaters consume 65-mW per channel; retimers with CDR consume 150-mW per channel.

2) Reduce bill of materials (BOM) cost and simplify system design:
  • Fully adaptive EQ simplifies link tuning.
  • Internal clock synthesis avoids the need for an external reference clock.
  • Built-in eye monitor and PRBS generator simplifies system debug.
  • Single power supply without the need for external RF chokes.

The signal conditioners are used to drive optical and direct-attach passive copper cables in latency-sensitive, front-port line cards, while meeting SFF8431 (SFP+) specifications. They also can be used to compensate for loss and crosstalk in backplanes, and reduce gauge thickness in active copper cable assemblies. Offered as a pin-compatible IC family, system designers can choose from repeaters (EQ and DE driver), retimers (EQ, CDR and DE driver), and advanced retimers (EQ, CDR, DFE and DE driver) to achieve the desired link performance and system cost without having to redesign their board:
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