Silicon-on-insulator at STM and IBM closing gap with Intel
April 17, 2012 // R. Colin Johnson
Silicon wafer maker Soitec S.A. claims that chip makers can sidestep years of development work needed to perfect fully-depleted (FD) silicon transistors by switching to its silicon-on-insulator (SOI) wafers, a ploy that has already convinced STMicroelectronics NV, ST-Ericsson and IBM Corp., to give it a try.
"Fully depleted transistor channels are quickly becoming a necessity for semiconductor manufacturers moving below the 32-nanometer node," said Steve Longoria, senior vice president of global strategic business development at Soitec. "IBM is going to SOI wafers for its FinFETs at the 14-nanometer node, and STMicroelectronics and ST-Ericsson are working with us to develop 2D fully-depleted transistors for their next-generation mobile processors at 28-nanometer."
One of the biggest problems facing continued scaling of semiconductors below the 32-nanometer node is non-uniformities of dopants in the nanoscale-thin transistor-channel layer. To solve that problem, the industry is going to undoped channels for FD transistors. Intel has gone to great lengths to design FD undoped channels for its tri-gate FinFET transistor using standard bulk silicon wafers, which as a result requires sidewall implant doping to isolate the channel and prevent excess leakage current into the substrate.
Soitec has two flavors of its SOI wafers, one for traditional planar transistors that offers and ultra-thin top silicon layer with tollerances of plus or minus just five angstroms, for the FD transistor channels, atop an ultra-thin buried oxide layer that prevents leakage into the substrate without the extra process steps that Intel uses for its bulk-silicon process.
The second SOI wafer from Soitec is for 3-D FinFET transistors, such as those IBM has announced it will use at the 14-nm node. The 3-D SOI wafer has thicker top silicon layers for the tall 3-D fins and a thicker buried oxide layer to accommodate the higher fields produced by the multiple metal gates.
Both the 2-D planar and 3-D SOI wafers cost about four-times more than bulk silicon—accounting for Intel's reluctance to use them for its tri-gate FinFET process. But Soitec claims that the time gained in FD transistor development plus the fewer processing steps required when fabricating FD channels with sidewall implantation, more than makes up for the high price of the wafers.
"Our wafers cost about $500 wafer compared to $120 for bulk silicon," said Longoria. "But their price is recouped from process simplifications to give a three-to-10 times overall cost reduction."
Soitec claims FD transistors built using its SOI wafers provide 40 percent better performance, or because of the drastic cut in leakage current supplied by the buried oxide layer, can alternatively provide 40 percent lower power when operated at current performance levels. Soitec also claims to be working with both IBM and ARM to create a specification for SOI wafers for taking their traditional planar transistors to undoped FD channels, which can nix problems with short-channel effects where closely spaced source and drain electrodes start leaking through a bulk-silicon substrate.
Automotive industry sees innovation in products, not business models
December 10, 2013
Innovation strategies in the automotive industry are aiming to technology and better customer orientation, states management ...
Big moves in chip vendor top 20 ranking
Extendible processors go head to head backed by EDA giants
Koch Industries acquires Molex for USD7.2 billion
EnOcean joins the OSGi Alliance to define universal open interface for energy harvesting wireless
GaN-on-silicon LEDs to grow market share to 40 percent by 2020
December 09, 2013
The penetration of gallium nitride-on-silicon (GaN-on-Si) wafers into the light-emitting diode (LED) market is forecast to ...
Pebble CEO turns back clock
Tyndall National Institute captures snapshots of moving atoms under bursts of light
Measurement technique allows survey of 3D micro objects
- 3mm × 3mm QFN IC Directly Monitors 0V to 80V Supplies
- UltraCMOS® Semiconductor Technology Platforms: A Rapid Advancement of Process & Manufacturing
- Adaptive Cell Converter Topology Enables Constant Efficiency in PFC Applications
- Isolated 4-Channel, Thermocouple/RTD Temperature Measurement System with 0.5°C Accuracy
InterviewPerformance monitoring solution helps provide intelligent control of high power systems
A performance monitoring solution designed to enable companies to monitor high power IGBT module systems in locomotive, wind turbine, High Voltage DC and industrial drive applications was unveiled this ...
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
Internet of Things (IoT) manufacturer Ciseco has launched the Raspberry Pi ‘Wireless Inventors Kit’ (RasWIK), featuring 88 pieces to provide everything a Pi owner needs to follow a series of step-by-step projects or to create their own wireless devices, without the need for configuration or even writing code.
RasWIK has been designed to be highly accessible, demystifying the dark art of wireless and enabling anyone with basic computing skills to begin building wireless devices with a Raspberry Pi. You can create anything from a simple traffic light, to a battery monitor, or even a temperature gauge that sends data to the Xively IoT cloud so billions can access the data.This month, Ciseco is giving away twelve Raspberry Pi Wireless Inventors kits, worth £49.99 each for EETimes Europe's readers to win.
And the winners are...
In our previous reader offer, Farsens was giving away five kits for EEtimes Europe readers to evaluate its FenixVortex, Kineo and X1 wireless, battery free sensor tags.
Lucky winners include Mr A. Neil from the UK, Mr. E. Delvaux from Belgium, Mr Lengal from the Czech Republic, Mr H. Bijlsma from the Netherlands, and Mr G. Pfaff from Germany. All should be receiving their packages soon. Lets wish them some interesting findings with their projects.
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.