Single and dual channel 14-bit ADCs with JESD204B serial outputs
January 30, 2012 // Paul Buckley
Intersil Corporation has introduced the industry’s fastest, lowest power single and dual channel 14-bit analog-to-digital converters with JESD204B serial outputs. The serial output ADCs provide single channel sampling rates up to 500 Megasamples/second and dual channel rates up to 250 Msps.
The ISLA224S/ISLA214S50 series represent the first ADCs now in production with JESD204B serial outputs. The integrated JESD204B-compatible transmitter offers data rates up to 4.375 Gbps per lane, requiring only two lanes to support either the dual channel 14-bit 250 Msps converter (one lane per channel) or the single channel 14-bit 500 Msps device.
An optional third lane is included in the transmitter to support the maximum sampling rate while operating the serial lanes at less than 3.125 Gbps, providing backwards compatibility with the JESD204A standard to support lower cost FPGAs. The JESD204B transmitter also provides deterministic latency between the ADC sample clock and the serialized data stream. This meets the synchronization requirements of multi-channel and I/Q communications systems.
Power consumption for the ISLA224S25 is 980 mW at 250 Msps, compared with 1000 mW or higher among competitive serial devices with lower sample rates. For the ISLA214S50, power consumption is 1050 mW compared with 2500 mW for competing products.
The ADCs also feature a compact footprint of just 7 mm x 7 mm. They are built using Intersil’s FemtoCharge technology on a standard CMOS process with the proven core from Intersil’s popular ISLA224Pxx series, which delivers best-in-class signal-to-noise ratio (SNR).
The ISLA224S and ISLA214S50 are optimal for high performance data acquisition and broadband communications systems. They are also ideal design choices for high speed medical imaging systems, microwave receivers and radar or satellite antenna array processing, and other high speed applications. Also, the integrated 8b/10b serializer eliminates the need for an external serializing device, simplifying the design of serial-data communications systems.
Intersil is offering an evaluation kit for use with these new ADCs which includes a modular hardware design, including a proprietary motherboard and interchangeable daughter cards, and Java-based software. The motherboard’s FPGA is available as a reference design for a SERDES receiver, and the daughter cards are compliant with the VITA 57 FPGA Mezzanine Card (FMC) standard, allowing it to also operate with FMC host cards such as the ML-605 from Xilinx.
More information about the ISLA224S/214S50 ADCs at
R&D centre advances simulation technology for car developers
May 27, 2015
One of the world’s most advanced vehicle simulators has launched its activities in Hethel (Norfolk, UK). The facility is ...
Xray sensor startup raises funds
IoT is driving an analog opportunity
Implanted biosensor can be wirelessly charged
Pushing emulation beyond functional tests
Sensor choices power industrial Internet innovation
May 26, 2015
Whether or not the Internet of Things will live up to its own hype, the notion has certainly got people thinking. Proposals ...
Software collaboration enables software quality compliance
Why NOW is the time to invest in security
eDP: the next rung on display control's evolutionary ladder
- Integrating GPS into consumer products
- Controlling LED Lighting Using Triacs and Quadracs
- Automotive Designs Demand Low EMI Synchronous Buck Converters
- Smart Capacitive Design Tips
InterviewCEO interview: What's next after Tower's turn-around?
May 2015 marks the tenth anniversary of Russell Ellwanger taking over as CEO of speciality foundry Tower Semiconductor Ltd. (Migdael Haemek, Israel), which now trades as TowerJazz. And so EE Times Europe ...
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
In this month's reader offer, Analog Devices is giving away five Blackfin Low-Power Imaging Platform (BLIP) Development Systems (ADZS-BF707-BLIP2), worth 199 dollars each, for EETimes Europe's readers to win.
Targeting demanding ultra-low-power, real-time applications for image sensing and advanced audio, the development platform leverages the company’s ADSP-BF707BBCZ-4 Blackfin processor as...MORE INFO AND LAST MONTH' WINNERS...
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.