Synopsys extends HAPS debug visibility by 100X in FPGA-based prototypes
April 26, 2012 // Julien Happich
Synopsys has released a new Deep Trace Debug feature for users of its HAPS FPGA based prototyping systems. With HAPS Deep Trace Debug, prototypers can take advantage of approximately 100 times more signal storage capacity than the traditional memory storage employed by on chip FPGA logic debuggers.
The new Deep Trace Debug feature enhances both capacity and fault isolation capabilities while freeing up the on chip FPGA memory required for validating complex system on chip (SoC) designs. “The Qualcomm Atheros' Wi-Fi/Bluetooth combo products use leading edge Wi-Fi standards to achieve gigabit per second throughput, requiring advanced hardware software validation techniques like those available in Synopsys’ HAPS systems,” said Manoj Unnikrishnan, director of engineering at Qualcomm Atheros. “Our traditional approach required multiple runs with a lot of trial and error. The high capacity sample storage available with HAPS Deep Trace Debug allows us to quickly identify bugs and speed full system validation. In addition, HAPS Deep Trace Debug will help us improve state machine coverage, prototyping coverage, and test pattern generation.”
Confirming correct functionality of high speed interface designs often requires sampling at dozens of frequencies for several milliseconds at a time. Traditionally, designers have had to make a choice between capturing long signal trace histories that consume extensive FPGA memory resources or saving FPGA memory resources but losing detailed visibility into signal trace history. By pairing the Synopsys Identify Intelligent Integrated Circuit Emulator (IICE) with a HAPS Deep Trace Debug SRAM daughter board, HAPS Deep Trace Debug allows many unique signal probes with complex triggers to be recorded and provides deeper memory to store extensive state history as the system executes. The SRAM daughter board also frees up the FPGA’s on chip RAM for prototyping an SoC design’s memory blocks.
Visit Synopsys at www.synopsys.comAll news
Conspiracy alleged over Rousset wafer fab closure
March 07, 2014
A class action lawsuit has been filed in Federal Court in New York alleging that Atmel Corp. (San Jose, Calif.) conspired ...
Europe loses PV market lead to Asia in 2013
Driverless car sharing concept focuses on digital comfort
Automated SSL test system authenticates LED technology performance
Paper-thin ultracapacitor aims to boost Li-ion battery performance
Apple set to transform sapphire wafer market
March 07, 2014
The sapphire industry ended an 18 month period of depressed pricing and achieved $936 million in revenue for wafer products ...
FTDI reveals streaming instruction behind new 32bit architecture
AMD taps UK tool for video verification
UHF RFID the radio technology of choice for Industry 4.0
- DSM presents: Select the best plastic for DDR4
- Wireless Sensor Network Challenges and Solutions
- Putting FPGAs to Work in Software Radio Systems Handbook
- Real-Time Spectrum Analysis for Troubleshooting 802.11n/ac WLAN Devices
InterviewWi-Fi is open for business, which is good news for mobile subscribers
Following the news that Netgear has built a Facebook-linked amenity Wi-Fi option into its routers, enabling businesses to offer free Wi-Fi in return for liking the company Facebook page, David Nowicki, ...
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
This month, Freescale is giving away ten RIoTboards, worth 74 dollars each, for EETimes Europe's readers to win.
Designed to run Android operating systems efficiently or to run under Linux, the board is based on the Freescale i.MX 6Solo processor; using the ARM Cortex-A9 architecture.
And the winner is...
In our previous reader offer, Crystal Display was giving...Read more
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.