Synopsys extends HAPS debug visibility by 100X in FPGA-based prototypes
April 26, 2012 // Julien Happich
Synopsys has released a new Deep Trace Debug feature for users of its HAPS FPGA based prototyping systems. With HAPS Deep Trace Debug, prototypers can take advantage of approximately 100 times more signal storage capacity than the traditional memory storage employed by on chip FPGA logic debuggers.
The new Deep Trace Debug feature enhances both capacity and fault isolation capabilities while freeing up the on chip FPGA memory required for validating complex system on chip (SoC) designs. “The Qualcomm Atheros' Wi-Fi/Bluetooth combo products use leading edge Wi-Fi standards to achieve gigabit per second throughput, requiring advanced hardware software validation techniques like those available in Synopsys’ HAPS systems,” said Manoj Unnikrishnan, director of engineering at Qualcomm Atheros. “Our traditional approach required multiple runs with a lot of trial and error. The high capacity sample storage available with HAPS Deep Trace Debug allows us to quickly identify bugs and speed full system validation. In addition, HAPS Deep Trace Debug will help us improve state machine coverage, prototyping coverage, and test pattern generation.”
Confirming correct functionality of high speed interface designs often requires sampling at dozens of frequencies for several milliseconds at a time. Traditionally, designers have had to make a choice between capturing long signal trace histories that consume extensive FPGA memory resources or saving FPGA memory resources but losing detailed visibility into signal trace history. By pairing the Synopsys Identify Intelligent Integrated Circuit Emulator (IICE) with a HAPS Deep Trace Debug SRAM daughter board, HAPS Deep Trace Debug allows many unique signal probes with complex triggers to be recorded and provides deeper memory to store extensive state history as the system executes. The SRAM daughter board also frees up the FPGA’s on chip RAM for prototyping an SoC design’s memory blocks.
Visit Synopsys at www.synopsys.comAll news
Polymer solar cell boosts power generation by 15 percent
September 22, 2014
Scientists in the University of Chicago’s chemistry department, the Institute for Molecular Engineering and Argonne ...
What Apple stuffed inside iPhone 6 plus
Nuclear spins shown to control current in LED
Trillions of sensors ahead - with interesting side effects
Breaking the 'electrode barrier' promises lower-cost organic PVs
Harvesting every bite of energy
September 22, 2014
Researchers, from Sonomax-ÉTS Industrial Research Chair in In-ear Technologies (CRITIAS) at École de technologie supérieure ...
Mars Probe Looks for Atmosphere 'Lost in Space'
Sensor Hubs Aided by IEEE-2700-2014 Datasheets
Daimler to test autonomous driving in California
- Putting FPGAs to Work in Software Radio Systems Handbook
- Flexible and Low Power Driving of Solenoid Coils
- How to Protect & Monetize Android Apps
- Power Modules: The New Super Power
InterviewCEO interview: AMS' Laney on driving a sensor-driven business
Kirk Laney, CEO of Austrian mixed-signal chip and sensor company AMS, wants to leverage the opportunity that technology affords to create new markets for sensors and sensor interfaces.
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
This month, Trinamic Motion Control is offering you to win one of four TMCM-1043 development kits for its highly integrated, NEMA 17-compatible TMCM-1043 stepDancer stepper motor module.
Offering designers an easy-to-use PC-based GUI that allows one-click modification of motor drive current, micro-stepping and other key parameters, the intuitive kits are custom designed and developed for...MORE INFO AND LAST MONTH' WINNERS...
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.