Synopsys extends HAPS debug visibility by 100X in FPGA-based prototypes
April 26, 2012 // Julien Happich
Synopsys has released a new Deep Trace Debug feature for users of its HAPS FPGA based prototyping systems. With HAPS Deep Trace Debug, prototypers can take advantage of approximately 100 times more signal storage capacity than the traditional memory storage employed by on chip FPGA logic debuggers.
The new Deep Trace Debug feature enhances both capacity and fault isolation capabilities while freeing up the on chip FPGA memory required for validating complex system on chip (SoC) designs. “The Qualcomm Atheros' Wi-Fi/Bluetooth combo products use leading edge Wi-Fi standards to achieve gigabit per second throughput, requiring advanced hardware software validation techniques like those available in Synopsys’ HAPS systems,” said Manoj Unnikrishnan, director of engineering at Qualcomm Atheros. “Our traditional approach required multiple runs with a lot of trial and error. The high capacity sample storage available with HAPS Deep Trace Debug allows us to quickly identify bugs and speed full system validation. In addition, HAPS Deep Trace Debug will help us improve state machine coverage, prototyping coverage, and test pattern generation.”
Confirming correct functionality of high speed interface designs often requires sampling at dozens of frequencies for several milliseconds at a time. Traditionally, designers have had to make a choice between capturing long signal trace histories that consume extensive FPGA memory resources or saving FPGA memory resources but losing detailed visibility into signal trace history. By pairing the Synopsys Identify Intelligent Integrated Circuit Emulator (IICE) with a HAPS Deep Trace Debug SRAM daughter board, HAPS Deep Trace Debug allows many unique signal probes with complex triggers to be recorded and provides deeper memory to store extensive state history as the system executes. The SRAM daughter board also frees up the FPGA’s on chip RAM for prototyping an SoC design’s memory blocks.
Visit Synopsys at www.synopsys.comAll news
Li-Fi communication module wirelessly transfers data at 1-Gbps
October 31, 2014
The Fraunhofer Institute for Photonic Microsystems IPMS in Dresden has developed communication modules that can wirelessly ...
Digital Lumens raises USD23m for intelligent LED lighting solution
Bosch brings electronic fuel system, connectivity to Asian motorbikes
NXP extends NFC ecosystem to the car
Japan's MegaChips to buy MEMS maker SiTime
Freescale CEO: 'IoT isn't just buzz'
October 30, 2014
Coming after the solid third quarter results that produced higher operating margins and improving cash flow, Freescale Semiconductor's ...
3D prints world's best inverter
Research project significantly improves electronics reliability
Netscout Acquires Communications Businesses From Danaher
- Wireless Power User Guide
- Secure is the New Smart
- 5 Best Practices for Designing Flexible Test Stations
- Intelligent PLCs Expand the Internet of Things
InterviewFreescale CEO: 'IoT isn't just buzz'
Coming after the solid third quarter results that produced higher operating margins and improving cash flow, Freescale Semiconductor's CEO Gregg Lowe had every reason to be chipper and lively when EE Times ...
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
This month, Oscium is giving away three of its iMSO-204L dual analogue iOS oscilloscopes, worth USD400 each. Designed with native Lightning compatibility, the iMSO-204L transforms the iPad, iPhone, and iPod touch into an ultra-portable, two-channel oscilloscope.
Since Apple changed its connector, Oscium has been working to bring native compatibility to its customers. The third generation...MORE INFO AND LAST MONTH' WINNERS...
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.