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TI to put floating point in every DSP core

November 10, 2010 // Junko Yoshida

TI to put floating point in every DSP core

The cellular base station market is heating up worldwide. As this happens, the competition between Texas Instruments and Freescale Semiconductor over base station SoCs is accelerating. The companies are intensifying efforts to promote novel designs for DSP cores, accelerators and microprocessors to enable flexible and powerful 3G and LTE/4G base stations


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.Beyond cost, power consumption and performance, the battle of next-generation comms SoCs is expected to focus on how to run complex algorithms like MIMO multiple antenna processing critical in broadband wireless networks in new chips.

TI has chosen to put both floating point and fixed point math in every core of its new DSP, hoping to achieve the high accuracy demanded by MIMO applications. Freescale, in contrast, plans to do it in the companys accelerator block called MAPLE, which uses a floating point engine inside.

TI have just announced a newly architected DSP TMS320C66x and four new scalable C667x devices, all produced using TSMCs 40nm process. TI claims to offer the industrys first 10GHz DSP, combining eight of its new DSPs, running at 1.25 GHz each.

TI is breaking new ground by integrating for the first time in DSP history both fixed point and floating point math in one core. Jeff Bier, Berkeley Design Technology, Inc. (BDTI), said TI is significantly upping the ante, by improving the new cores ease of use for developers.

Using the new DSP cores, TI is also launching a four-core communications SoC, targeting both the 3G and LTE/4G markets. While defending its dominance in the legacy wireless standards-based base station market, TI is eager to demonstrate that the new SoC can lead the emerging 4G base station market where Freescale has significantly stepped up the game over the last 18 months.

TIs new communications SoC is designed to simultaneously transmit and receive 3G and 4G data on the same silicon, with no additional ASIC or FPGA needed, said Brian Glinsman, general manager, communications infrastructure, DSP systems group at TI.

TI, obviously, isnt alone in throwing new technologies at growing challenges in the cellular network market.

Freescale is introducing next Monday (November 15th) a new generation DSP-based product. It doubles the performance, while offering specific acceleration IPs designed to increase throughput, said Lisa Su, Freescales senior vice president and general manager, networking and multimedia. Without leaking details, Freescales Su indicated that beyond the performance enhancements in the companys new DSP, we have quite a few tricks in the bag include advancements in the accelerator side and the microprocessor side.

Will Strauss, president of Forward Concepts observed, Although Freescale doesn't have the market size of TI, they have introduced some very novel acceleration technology to augment their DSP chips, and have displaced TI in some base station design-ins.

Still, Freescale faces an uphill battle against TI, which has its formidable presence in legacy 3G cellular networks. With the upcoming communications SoC, Freescale plans not only to add fuller 3G capabilities to its portfolio but also to beef up its performance for emerging cellular networks including LTE and upcoming LTE-Advanced (LTE-A) standards.

As the growing data traffic swamps cellular networks, operators are demanding that equipment suppliers deliver significant reduction in cost per megabit and a semiconductor solution that runs on a common platform (capable of handling both 3G and 4G/LTE networks), noted Su.


Floating versus fixed point

TIs new C667x DSP family is based on KeyStone multicore architecture. Under the architecture, a multicore navigator ensures that the DSP core can maximize the throughput of on-chip data flows and eliminates the possibility of bottlenecks.

BDTIs Bier noted that TIs new DSP core slightly accelerates the clock speed, while it significantly improves parallelism.

BDTIs independent benchmark results showed that TIs new 1.25 GHz C66x core is 30 percent faster than TIs previous generation DSP. (The C66x core delivered a fixed-point BDTImark2000 score of 16,690 beating the 13,170 score of TIs C64x+ core.) TIs C66x also proved 10 percent faster than Freescales SC3850 core which previously achieved a best of 15,420.

On floating-point performance, the C66x sets a new bar for DSP processors with a BDTImark2000 score of 10,720, according to Bier. BDTI is making the details of the benchmark results available at its website.

The advantage of incorporating full-blown floating point math in every C66x DSP core is clear, said TIs Glinsman. Developers can use the natural math language (in floating point) to run applications algorithm. They dont have to convert everything to fixed point operations.


MIMO factor

A case in point is MIMO multiple antenna applications. With floating point in each DSP core, developers can leave complex numeric algorithms such as MIMO applications to floating point, explained Bier. For something like MIMO application, which is super touchy and requires high accuracy, Bier said that not having to do matrix inversion is a huge win for developers.

Historically, floating point has been an unloved step child in the DSP family, said Bier. It didnt get much investment, because companies always looked for high volume applications for their DSPs. Such high volume applications almost always demand highly optimized cost, power consumption and performance, all best served by fixed point operations.

But the emergence of more complex applications often demanded by cellular networks may challenge the conventional wisdom. At a time when the size of engineering team is shrinking and the window for a development cycle is getting narrower, said Bier, ease of use becomes paramount for many developers. With floating point math in every DSP core, I think TI will change the game, Bier concluded.

Freescale agrees with TI that using floating point DSP for MIMO antenna processing has merit, accomplishing the accuracy demanded by MIMO. But Freescale is taking a different next-generation approach, according to Scott Aylor, director of DSP products at Freescales networking & multimedia group.

He explained that MIMO antenna processing demands precision, but is also very time critical. While the use of floating point DSP cores can enhance accuracy, it incurs a time penalty, said Aylor. Thats because floating point operations take two to four times more core cycles. Freescale believes equipment vendors wont tolerate such latency. According to Aylor, Freescale is using a dedicated engine in the companys MAPLE (Multi Accelerator Platform Engine) accelerator block to offload the multiple-antennas processing function. Meanwhile, we can allow our customers more DSP core capacity to apply to other differentiated tasks in the system, he added.

Freescale isnt dismissing the use of floating point, though. Aylor said: This accelerator block in MAPLE uses a floating point engine inside. It provides the accuracy required but has a much higher throughput. Freescale expects this higher throughput to offer significantly improved latency performance over a floating point DSP core based solution, said Aylor.


Base station market

So, whats the landscape for the base station market today?

TI continues as number one, followed by Freescale and LSI Corp., according to Forward Concepts Strauss. Earlier this year, Strauss observed TI garnering a 61 percent of the wireless infrastructure DSP market, followed by Freescale at 16%, LSI at 9% and Others (including Fujitsu, NEC, etc.) at 14%.

Many analysts note that Freescale has become a formidable competitor to TI. Joseph Byrne, senior analyst at the Linley Group, said, Freescale has done well recently on the strength of its products. Freescale was early with a 45nm DSP and used this process-technology advantage to integrate on a single chip more DSP cores than TI, and MAPLE-B coprocessor that offloads certain functions related to baseband processing, he added.

Indeed, while many thought TI had locked up the base station market at one point, Freescale made a successful bid to it in the LTE/4G market over the last two years, said BDTIs Bier. Freescales success inspired others like Mindspeed Technologies and LSI Logic to take some pieces of the action, Bier added.

While nothing is announced, Intel, too, has made clear overtures toward the base station market, according to Bier. Intel, at the SDR conference a year ago, unveiled its SDR implementation in wireless base stations, using Intels PC processors.

Strauss also noted that FPGAs continue to have a significant role in the base station market. Even though TI swears that their newest chip doesn't require FPGAs, Strauss said, Every time I peek into the base station, there are a number of FPGAs...sometimes employed as RF down converters, which is still a necessary DSP function, but not as part of the baseband.

As competition intensifies, each player needs to get even more creative in new product offerings. The issue is how future base-station SoCs handle not just the physical (Layer 1) and data link layers (Layer 2) but the network layer (Layer 3) and above in the OSI model.

In TIs new base station SoC, TIs engineering team integrated an autonomous packet processing engine and programmable DSPs enabling full multicore entitlement, in addition to the filed proven PHY technology where TIs legacy strength lies.

Freescale, meanwhile, has a distinct edge in its network processors, which have remained separate products thus far. Industry analysts like Bier are closely watching when and how Freescale may integrate such network processing functions into base station products.

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