TSMC's R&D chief sees 10 years of scaling
October 26, 2011 // DylanMcGrath
The path is clear for continued semiconductor scaling using FinFETs for the next decade, down to the 7-nm node, according to Shang-Yi Chiang, senior vice president of R&D at foundry giant Taiwan Semiconductor Manufacturing Co.
Beyond 7-nm, the most pressing challenges to continued scaling will come from economics, not technology, Chiang said in a keynote address at the ARM TechCon event.
Chiang said he has faith that the semiconductor industry will solve technical hurdles associated with moving past 7-nm over the next decade, but acknowledged that the new technologies might make volume manufacturing of chips with critical dimensions smaller than 7-nm cost prohibitive.
"From node to node, we have found the wafer price has increased much more than previous nodes," Chiang said.
In another ARM TechCon keynote later, Chi-Ping Hsu, senior vice president of R&D at in EDA vendor Cadence Design Systems' Silicon Realization Group, presented data on dramatic cost increases associated with moving from the 32/28-nm node to the 22/20-nm node. The amount of money invested by the semiconductor industry in process R&D, for instance, jumped from $1.2 billion at 32/28 to between $2.1 billion and $3 billion at 22/20, Hsu said. Design costs for a chip jump from $50 million to $90 million at 32-nm to $120 million to $500 million at 22-nm, Hsu said.
At the 32-nm node, a chip needs to sell about 30 to 40 million units to recoup the costs associated with it, Hsu said. At the 20-nm node, the "breakeven" point jumps to between 60 and 100 million units, Hsu said.
FinFETs are three-dimensional transistors in the early stages of being adopted by chip makers. Intel Corp., which refers to its 3-D transistor technology as "tri-gate," is expected to begin sampling 22-nm chips with 3-D transistors later this year.
Chiang said the 20-nm node will be the last generation at which the semiconductor industry can possibly use a planar transistor. "After that, it will run out of steam," Chiang said.
Ag nanodiscs to boost MoS2's LED performance
April 01, 2015
Researchers at Northwestern University's McCormick School of Engineering have fabricated a series of silver nanodiscs which ...
MOSTCO demos integration of MOST bus with Autosar
IoT encryption: a revenue driver for CSPs
3D Qualcomm SoCs by 2016
How will deep learning change SoCs?
Electronics printed in France
March 31, 2015
During an industry meeting last week, the French association of printed electronics (Association Française de l'Électronique ...
Sony licenses bonding technology from Ziptronix
Delphi selected to build Audi’s autopilot computer
Medical chip market on 12% CAGR
- High-Speed, Real-Time Recording Systems Handbook
- New Linear Regulators Solve Old Problems
- Intelligent Over Temperature Protection for LED Lighting Applications
- Intel helps to Turbocharge Infotainment Systems Designs
InterviewInfineon: CAN FD success goes at the expense of FlexRay
The faster version of the venerable CAN bus, CAN FD is currently taking off at several carmakers. Infineon's Thomas Böhm, Head of Body / Automotive, believes this could well go at the expense of FlexRay. ...
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
This month, DecaWave is offering EETimes Europe's readers the chance to win two TREK1000 kits to evaluate its Ultra-Wideband (UWB) indoor location and communication DW1000 chip in different real-time location system topologies.
Worth €947, the kit allow designers to prove a concept within hours and have a prototype ready in days. Based on the two-way ranging scheme, the kit lets you test...MORE INFO AND LAST MONTH' WINNERS...
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.