Verdi debug software now supports extensive Universal Verification Methodology
May 02, 2011 // Julien Happich
SpringSoft announced comprehensive support for the Universal Verification Methodology (UVM) with its Verdi Automated Debug System. The Verdi software adds UVM source code and new transaction recording capabilities to its existing HDL debug platform, making it easier for engineers to visualize and debug the complex SystemVerilog testbench structures required to test sophisticated system-on-chip (SoC) devices.
UVM is becoming an industry standard approach to ensuring the reusability and interoperability of testbench code (also referred to as verification IP), integrated from multiple sources or developed using different methodologies. The Verdi UVM capabilities are enabled within the system's unified testbench and design debug environment for more efficient recording and viewing of transaction data, beyond what is supported by the current UVM infrastructure.
With the ability to visualize a broader range of information between the testbench and design under test at the transaction level, Verdi users have a more complete picture of their environment, which is especially critical during detailed regression testing phases. SpringSoft implemented full UVM source code support with the industry standard SystemVerilog library. In addition, the company provides a custom SystemVerilog file in the Verdi system to transparently record all UVM transactions into the company’s defacto standard Fast Signal Database (FSDB) for a complete record of the traffic between testbench components.
The transaction data can be used within the existing Verdi waveform tool or in a new Unified Modeling Language (UML)-based sequence diagram view. The automated mechanism eliminates the need for manual recording processes, such as the output of transactions as text messages and instrumentation of testbenches to print transactions into a text file.
Key features of the new UVM testbench debug capabilities include a tabular spreadsheet view for highlighting and filtering the transactions, easy-to-use class browsers for navigating testbench hierarchy, and automated tracing through source code to identify the origin of testbench problems. As UVM use models continue to evolve and gain broad industry adoption, SpringSoft will extend its Verdi support with dynamic data dumping capabilities as well as more advanced automation to record different kinds of data and create additional views.
Visit at SpringSoft at www.springsoft.comAll news
Google-led group preempts HEVC
September 03, 2015
Internet giants Google and Cisco have banded together with Amazon and Netflix, two large streaming service players, along ...
IT security is changing: if the SIEM is dead, what's next?
The future of print and paper: digital hybrids
Google backer offers $50 million quantum computer investment
Solar-charged transparent Li-ion battery promises 'smart windows'
Domain controller concept gains traction
September 02, 2015
Automotive supplier ZF TRW has won two business contracts for the second generation of its Safety Domain ECUs. The orders ...
Does a Chinese bid for GloFo make sense?
Imec laminates stretchable LED display onto garments
IoT conquers consumer electronics
- High Voltage CMOS Amplifier Enables High Impedance Sensing with a Single IC
- Software-Defined Radio Handbook
- Why Making the Move from a Variable Transformer to a VariPLUS is the Right Decision
- Automating Leakage and Functional Testing
InterviewCEO interview: Ambiq sees broader options for low voltage
Mike Noonen, recently appointed interim CEO at microcontroller startup Ambiq Micro, discusses the focus and opportunities for this pioneering company designing circuits that can operate below the threshold ...
Filter WizardCheck out the Filter Wizard Series of articles by Filter Guru Kendall Castor-Perry which provide invaluable practical Analog Design guidelines.
Linear video channel
READER OFFERRead more
This month, Altera is giving away three of its second-generation Nios II Embedded Evaluation Kit (NEEK), worth 9 each, for EETimes Europe's readers to win.
The feature-rich platform provides a fast and simple way for embedded designers to experience the capabilities of a custom embedded processor in a non-volatile FPGA.
MORE INFO AND LAST MONTH' WINNERS...
December 15, 2011 | Texas instruments | 222901974
Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.