Verification IP for the latest HDMI 2.0 specification
September 12, 2013 // Julien Happich
Cadence Design Systems makes available what it claims to be the industry's first verification IP (VIP) supporting the new HDMI 2.0 specification, enabling designers to quickly and thoroughly verify that their SoCs conform to the HDMI 2.0 specification.
The verification IP supports all major logic simulators, verification languages, and methodologies including the Universal Verification Methodology (UVM).
Visit Cadence at www.cadence.com
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This month, Arrow Electronics is giving away ten BeMicro Max 10 FPGA evaluation boards together with an integrated USB-Blaster, each package being worth 90 Euros, for EETimes Europe's readers to win.
Designed to get you started with using an FPGA, the BeMicro Max 10 adopts Altera's non-volatile MAX 10 FPGA built on 55-nm flash process.
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Unique Ser/Des technology supports encrypted video and audio content with full duplex bi-directional control channel over a single wire interface.