Voltage regulators stacked in 3-D
February 23, 2012 // R. Colin Johnson
The first integrated voltage regulators can be located on the bottom of a 3-D chip stack, according researchers at IBM and Columbia University, who recently demonstrated a silicon interposer containing the necessary magnetic inductors at the International Solid State Circuits Conference (ISSCC) in work funded by Semiconductor Research Corporation (SRC) and the U.S. Department of Energy.
"What we have done at this point, is integrate the power inductors on a silicon interposer in what we call a 2.5-D stacknot true 3-D since we don't yet have TSVs," said Ken Shepard, a professor at Columbia University. "The next step, which we are already fabbing, is a full 3-D stack where the silicon interposers contains not only the power inductors, but also the power trainthe transistors that switch those power inductorsenabling power to flow from the package up through the interposer, where it is converted down in voltage then sent up through TSVs to power the CMOS chip itself on top."
Today voltage regulators are located on separate chips combined with discrete components that must feed printed-circuit board (PCB) traces connected to chip pins, requiring large currents to be pushed through extensive power distribution networks, presenting problems with both loss and power supply integrity. However, by switching the industry to voltage regulators located at the bottom on 3-D chip stacks, future self-regulating 3-D CMOS chip stacks will allow these high current levels at low supply voltages to be generated right at the load, improving overall energy efficiency by up to 20 percent, according to SRC. All news
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