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Wolverine microcontroller platform slashes power by 50 percent

February 28, 2012 // Paul Buckley

Wolverine microcontroller platform slashes power by 50 percent

Texas Instruments Incorporated has unveiled feature-packed MSP430 microcontroller platform with the aim of pushing ultra-low-power limits, bringing consumers one step closer to a battery-free world.


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TI says it is codenaming Wolverine for this aggressive power-saving technology, the ultra-low-power MSP430 microcontroller platform offers at least 50 percent less power consumption than any other microcontroller in the industry (360 nA real-time clock mode and less than 100 uA/MHz active power consumption). The first devices based on this platform will be the MSP430FR58xx microcontroller series with expected availability in June 2012.

The Wolverine platform provides the lowest power consumption in any use case when compared to any microcontroller in the industry lowest active power, standby power, memory power and peripheral power. For example, typical battery powered applications spend as much as 99.9 percent of their time in standby mode, and "Wolverine"-based microcontrollers consume 360 nA in standby mode, more than doubling battery life.

TI developed the ULL technology that offers a 10x improvement in leakage and optimized mixed signal capabilities. The improved 130 nm process technology, ultra-low-power MSP430 architecture and more than 30 power-optimized analog and digital components combined are a few of the integrated elements that deliver the dramatic power reduction.

Taking advantage of FRAM, the world's lowest power memory, Wolverine-based microcontrollers can operate at less than 100 A/MHz in active mode and consume 250x less energy per bit compared to Flash- and EEPROM-based microcontrollers. In addition to these power advantages, FRAM is 100 percent non-volatile, which gives developers the low power, speed and flexibility of SRAM while retaining the key no-power storage capability of Flash. Customers are not limited to the specific ratios of program-to-data memory inherent to traditional embedded systems they can change this ratio at any time in the design cycle.
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