ARM describes 10nm test chip

May 19, 2016 // By Jessica Lipsky
ARM announced it taped out a 10nm FinFET test chip in January at TSMC. Chips made in the process will be in handsets by the end of the year, ARM said, describing the node as relatively expensive and focused on lowering power.

The ARM test chip used four of its yet-to-be-disclosed Artemis cores running at 2.8 GHz, an unknown GPU and memory subsystem among other components. Unlike previous nodes, the TSMC 10nm process is focused less on pushing performance to the max and more on lowering power consumption, ARM said.

Test chip architecture Source: ARM

Compared with a Cortex A-72 on TSMC’s 16FF+ process, the 10nm SoC operating on the same frequency showed a 0.7%, 11% and 12% improvement in performance depending on the use of overdrive which ARM defines as nominal + 100 mV. Eventually, 10nm chips should show a 30% improvement in power consumption compared with its predecessors.

The Artemis core itself appears to be focused mainly on lowering power consumption and size based on ARM’s comments about the test chip.

Data on total power versus performance of 10nm FinFET test chips compared to 16nm FinFET. Source: ARM

“Artemis is a small core, so you’re going to get some architectural benefits in leakage, just as much frequency, better power and smaller,” said Ron Moore, vice president of marketing for ARM’s physical design group. “Performance between Artemis and an A-72 are going to be pretty much at the same level.”

TSMC has been working closely with ARM on process technology and IP for the past four years. However, ARM also is working with Samsung as its foundry aggressively pushes toward its own 10nm FinFET process.

While Samsung and TSMC race to be the first to market with a 10nm node, Moore isn’t concerned about who comes in first. “The fin size is different but I can accomplish the same thing using Artemis in both processes,” he told EE Times.