ChipVORX prototype instruments execute Bit Error Rate Tests

November 20, 2012 // By Julien Happich
Goepel electronic has introduced the first ChipVORX model prototype to execute Bit Error Rate Tests (BERT) using on-board FPGA.

The new solution enables the use of FPGA Embedded Instruments in the form of special softcores for the test and design validation of high-speed I/O. This will allow users to evaluate the quality of interconnections by way of bit error rates and also by analyzing eye diagrams and is compatible with the newest FPGA families. The entire ChipVORX workflow is highly automated and does not require any design synthesis.

So called Bit Error Rates (BER) are measured to evaluate the channel quality in digital transmission systems. BER is the relation between faulty transported bits and the total number of transported bits in a certain time interval.

The equipment consists basically of the pattern generator, a transceiver with error detector and a clock generator, synchronizing both. The bit patterns, created by the pattern generator, are especially important for the quality of the Bit Error Rate Test, as they have critical influence on the fault stimulation during the transmission (stress pattern).

Chip embedded Instruments are part of the so called Embedded System Access (ESA) technologies, featuring methods such as Boundary Scan, Processor Emulation Test, in-system programming or Core assisted Programming.

ChipVORX is an IP-based technology for implementation, access and control of Chip embedded Instruments via IEEE Std. 1149.x/JTAG. It also supports FPGA embedded instruments in the form of softcores.

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