In their paper "Quasi-ballistic carbon nanotube array transistors with current density exceeding Si and GaAs" published in the journal Science Advances, researchers from the University of Wisconsin-Madison presented carbon nanotube transistors with current densities 1.9 times higher than that of silicon transistors.
The CNT array FETs are designed at a density of 47 CNTs per micrometre, fabricated through a combination of CNT purification, solution-based assembly, and CNT treatment.
"The conductance of the arrays reaches 1.7 mS μm −1, which is seven times higher than the previous state-of-the-art CNT array FETs made by other methods", reports the paper, with a saturated on-state current density as high as 900 μA μm −1, exceeding that of Si FETs when compared at and equivalent gate oxide thickness.
The researchers used polymers to selectively sort out the semiconducting nanotubes, then relied on "floating evaporative self-assembly", a technique they developed a couple of years ago to tightly align and deposit the CNTs before curing the deposited material to remove any remaining polymers and ensure a good electrical contact with patterned metal electrodes. So far, the alignment and deposition process was scaled up to 1 inch by 1 inch wafers, but work is in progress to further scale it up for commercial production.
The processes have been patented and the researchers hope they'll be of use for the integration of CNTs in logic, high-speed communications, and other semiconductor electronics. They are now adapting their techniques to match the geometry used in silicon transistors. They are also busy developing high-performance radio frequency amplifiers.