Cortex-A32 processor core aims at next IoT

February 25, 2016 // By Peter Clarke
ARM Holdings plc (Cambridge, England) is offering a stripped-down version of its Cortex-A35 core that the company claims will be a good fit for next-generation embedded products aimed at the Internet of Things.

Because of that stripping down that Cortex-A32 is described by ARM as the smallest and most power-efficient A-class processor core.

The Cortex-A32 adheres to the ARMv8-A instruction set architecture but does not carry the overhead to support 64-bit operations. Through backwards compatibility with previous architectures it is able to run software compiled for the ARMv7 architecture as well as the Arch-32 part of ARMv8-A. The Cortex-A32 also includes TrustZone technology making it suitable for power-constrained "edge" nodes that only requires 32-bit working but still need to provide security.

The core implements cryptographic instructions for efficient authentication and protection, the Cortex-A32 can also be coupled with TrustZone CryptoCell-700 series products to enable cryptographic hardware acceleration and advanced root of trust. 

Typical applications for the core could include electronic point of sale terminals, industrial, smart home, next-generation wearables and automotive, said James McNiven, general manager of ARM's CPU group.  

In the same process technology the Cortex-A32 saves 13 percent of the die area compared with the Cortex-A35 while being 10 percent more efficient in terms of performance per power consumed, McNiven, told EE Times Europe . Given that the Cortex-A35 was hailed as the "most efficient" A-class processor core on its introduction at ARM TechCon in October 2015 that title now passes to the Cortex-A32.

Compared with the Cortex-A7 it is 25 percent more efficient. In a 28nm CMOS, the process node at which the design is predominantly aimed, the A32 is expected to take up less than 0.25 square millimeters of silicon die while consuming 4mW at a 100MHz clock frequency.

The Cortex-A32 can be configured from a single- to a quad-core, providing scalability from energy harvesting wireless sensor nodes to industrial computing but it is not intended to be deployed in big-little configuration.

The core was not developed with a lead partner but it already a number companies have access to the technology, McNiven said. First SoC silicon