Steffen and colleagues at T.J. Watson Research Center described their three breakthroughs Tuesday (February 28) at the annual meeting of the American Physical Society (APS) in Boston.
"Given where we are now with coherence times, our engineers are now turning to the remaining engineering challenges that still need to be addressed before commercialization," said Steffen. "In particular, we need to be very careful about how we design the microwave interfacing to our quantum chips."
The three breakthroughs described by IBM include nearly 0.1 millisecond (95 microseconds) coherence time for a q-bit isolated from its environment inside a 3-D copper waveguide cavity. The second demonstration was of a nearly identical q-bit, but mounted on a 2-D planar substrate, which was able to achieve a 10 microsecond coherence time. And the third breakthrough was demonstration of a 95-to-98 percent success rate for a two q-bit logical operation called a controlled-NOT. The significance here is that a C-NOT gate, together with single q-bit gates, can be configured to perform any quantum computation (in a manner similar to how the NAND gate can be configured to perform any classical computation.)
The basic q-bit repository demonstrated by IBM consisted of a super-cooled Josephson junction consisting of two superconducting electrodes separated by an insulator. A super-cooled capacitor connected the two superconducting electrodes in order to lower the frequency of its operation into a regime that standard measurement equipment can handle today—upwards of 20 GHz—necessitating the use of microwave-caliber test electronics.
The construction of the q-bit memories and gates were all performed with micro-fabrication techniques already in common usage for standard silicon chips, making IBM optimistic that it will be able to scale its system architecture up to thousands or even millions of q-bits per chip. As a result, calculations that were once considered impossible to perform can now at least be envisioned.