The ICs were 64-bit, four-core Xeon E3-1230 CPUs intended for the server market, which Chipworks (Ottawa, Ontario) said it obtained in Hong Kong, China.
The triangular section is markedly different to the idealized rectangular section that Intel had shown previously in 2011. However, it is not clear whether the non-vertical sides to the fins are a non-critical manufacturing artifact or are deliberately engineered by Intel and have a critical impact on electron mobility or yield.
Gold Standard Simulations Ltd., (Glasgow, Scotland), a spin-off from the University of Glasgow led by Professor Ase Asenov as CEO, responded by saying on its website: "There is a lot of speculation about the possible advantages and disadvantages of the trapezoidal, or almost triangular, shaped 'bulk' FinFET." GSS has performed a simulation analysis of the FinFET using its statistical 3-D TCAD simulator called Garand.
GSS's simulation was used to explore the dependence of threshold voltage on gate length for the trapezoidal Intel transistor and an equivalent rectangular-fin transistor. "Clearly the rectangular fin has better short channel effects. Still, the million-dollar question is if the almost-triangular shape is on-purpose design, or is this what bulk FinFET technology can achieve in terms of the fin etching?"
The comparisons between dimensionally comparable rectangular and trapezoidal FinFETs are not markedly different but as GSS had no knowledge of doping profiles it assumed a lightly doped channel. At the same time GSS acknowledged that there is a high doping concentration stopper below the fin in the shallow trench isolation (STI) region. "Clearly FinFETs are more complicated devices in terms of understanding and visualization compared to the old bulk MOSFETs," GSS concluded.