Although RMG technology is inherently more complex than gate-first integration, it has a number of advantages that allow increasing the device performance and that widen the choices in terms of high-k and metal gate materials.
One of the current challenges to enable further device scaling is the choice of gate dielectric and gate electrode. For the selection of the gate electrode, the key parameters to consider are the work function, resistivity and compatibility with CMOS technology. Further scaling also requires continued improvement of the channel mobility, adding the options for improved stress management and also reliability control as a first-order consideration in the choice of materials and processes.
In the industry, the RMG approach is rapidly becoming the integration scheme of choice, and an alternative for the gate-first approach. In RMG, the high-k gate dielectric is deposited in the beginning of the flow or just prior to gate electrode deposition and the gate electrode is deposited after the formation of the junctions.
A clear advantage is the enhancement of the channel stress in shorter devices because of the dummy-gate removal, an intrinsic step in RMG flow. RMG also allows metal gate processes with a lower thermal-budget, which broadens the range of material options for work-function tuning and reliability control. Additional advantages are a lower gate resistance compared to gate-first, important for RF CMOS, and more room for mobility improvement.
With the eye on further scaling to sub-20nm technology nodes and in collaborating with the major tool suppliers, imec is now evaluating RMG technology for different applications, looking at different integration options, materials selection and engineering, and compatibility with advanced modules and device architectures.
This research is performed in cooperation with imec's key partners in its core CMOS programs Globalfoundries, INTEL, Micron, Panasonic, Samsung, TSMC, Elpida, SK hynix, Fujitsu and Sony.
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