Single-chip powerline modem solution supports worldwide frequency bands

October 21, 2015 // By Paul Buckley
Renesas Electronics has launched the third generation OFDM powerline modem solution which continues to provide the flexibility to support any PLC protocol standard, such as PRIME1.3.6/1.4 and G3, for all global frequency bands including CENELEC A, FCC and ARIB.

Renesas’ third generation of flexible single-chip powerline solutions allows meter manufacturers to manage their key challenges more easily, as it helps shorten time-to-market, minimise risk and maximise system cost efficiency. With its increased memory headroom and boosted protocol processing performance, new generation PLC protocols like PRIME 1.4 with full band-plan coverage can be supported. In addition, functions like dual-route communication can be implemented, helping customers to differentiate their products.
 
With the constant evolution of the metering market and the rise of smart meters, the metering manufacturers face many challenges in developing new smart grid systems including smart meters and concentrators to support ever changing needs. Governments and utility providers are drivers of this change and in many cases the tenders for the various mass deployments are divided into multiple tranches with different specifications and schedules. In response to this scenario, the meter manufacturers have to develop solutions to meet a rapid time to market requirement as well as a low total cost of ownership, at minimum risk. The clear solution is a flexible platform approach that meets the multiple PLC communications standards needed for pan-European and global solutions. The third generation of Renesas’ flexible software defined multi-standard powerline solution fully meets these requirements.
 
The aim for the new generation was to reduce overall BOM cost, to increase robustness, to increase performance and to even have the ability to support dual route communication where required. The new modem device integrates an enhanced MAC controller supporting large scale network hopping and routing as well as a high performance digital signal processor (DSP) with special instructions for PLC, covering the physical layer (PHY) and real time processes of the media access protocol (MAC) implementation. Furthermore, DSP algorithms are implemented to improve robustness by using noise detection, noise reduction and error correction mechanisms. Exceptional signal quality and a wide dynamic range are claimed to be ensured by the embedded analog front end (AFE) with an integrated adaptive gain amplifier including automatic gain control (AGC) functions. The integration of the LDO regulator, the DC/DC converter and the transmit filters in turn leads to a reduced noise impact from the power supply as well as to an overall reduced bill of materials.